From patchwork Wed Feb 7 10:51:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suganath Prabu S X-Patchwork-Id: 10204969 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8880560247 for ; Wed, 7 Feb 2018 10:52:18 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 70EA128DF5 for ; Wed, 7 Feb 2018 10:52:18 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 655DE28EE4; Wed, 7 Feb 2018 10:52:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E469128DF5 for ; Wed, 7 Feb 2018 10:52:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753905AbeBGKwQ (ORCPT ); Wed, 7 Feb 2018 05:52:16 -0500 Received: from mail-qt0-f196.google.com ([209.85.216.196]:38751 "EHLO mail-qt0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753785AbeBGKwO (ORCPT ); Wed, 7 Feb 2018 05:52:14 -0500 Received: by mail-qt0-f196.google.com with SMTP id z10so608087qti.5 for ; Wed, 07 Feb 2018 02:52:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=9wpQj+zdjmPwZNpL/UTqs4FU/GsHl2NSMuKSrDRaEqI=; b=gmDVXl6cvbnQtcjGITY72gDv8ekgPn8Xg72rCTPkWxNmB4dH2caI+3oKIXvFZ39MuK J0E3rkR610mOVjTfBMILFYZoOqUmlOE1LuroGGuU29PxmmBPh92OZ3c70I8a2yPxSDrp r+9jCWfs/dBONG81lmBKkxQZ0kP1I9zktKAbY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=9wpQj+zdjmPwZNpL/UTqs4FU/GsHl2NSMuKSrDRaEqI=; b=tyLMewiD+uahtSal4UigNwAXEzOTs0IaC+H7HEL50q2p8pY87SyIsqbqJL3PL+mgW/ ADrm7eRbMPsGUkfsw+34UaNUQI3iHR+nzsDLX4RqSG8VdqTFYD3+jvsFiY+8otbnJuDl 0t/1rh0x1aMmrpm32+fVdyL2mb27pOg3sjBGL6GAvFzoTobhv3NgWwhJFsw981qauDFa ZAjEgeQkYDouWiLpzlRVJ/avx3JdHu/95p7soKJX82Cw7j847huZZCYp6fvcvjdt4ojs jXr540yqtTliFPWettgjDG0n9BwspnwxSkoE9ZFFeoMe3Janz4m5NyHvpSylSZw3Om26 YIhw== X-Gm-Message-State: APf1xPCYdLgKJjk7r+Hfb4RlaNk2QoRYxH4iJazc4yJRzCMnFvPmWbkk x2+bjGoFweiUTinQz9HKfPibSbMa X-Google-Smtp-Source: AH8x226nRo4tooJ9wVu0cIXBrweU/bkX8/INbLBSetXmAPTkZKnlhGeTTaT5NSEBO/EGWGsCl849lQ== X-Received: by 10.200.38.156 with SMTP id 28mr8120288qto.220.1518000733113; Wed, 07 Feb 2018 02:52:13 -0800 (PST) Received: from dhcp-135-24-192-103.dhcp.broadcom.net ([192.19.252.250]) by smtp.googlemail.com with ESMTPSA id a63sm834005qkj.70.2018.02.07.02.52.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 07 Feb 2018 02:52:12 -0800 (PST) From: Suganath Prabu S To: linux-scsi@vger.kernel.org, linux-nvme@lists.infradead.org Cc: Sathya.Prakash@broadcom.com, sreekanth.reddy@broadcom.com, chaitra.basappa@broadcom.com, Suganath Prabu S Subject: [V1 2/6] mpt3sas: Configure reply post queue depth, DMA and sgl tablesize. Date: Wed, 7 Feb 2018 02:51:46 -0800 Message-Id: <1518000710-17256-3-git-send-email-suganath-prabu.subramani@broadcom.com> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1518000710-17256-1-git-send-email-suganath-prabu.subramani@broadcom.com> References: <1518000710-17256-1-git-send-email-suganath-prabu.subramani@broadcom.com> Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This configures shost max sector to 128, single reply descriptor post queue, sgl table size to 16 and 32 bit DMA for MPI Endpoint and it supports 64K as max IO. Signed-off-by: Suganath Prabu S --- drivers/scsi/mpt3sas/mpt3sas_base.c | 47 +++++++++++++++++++++++------------- drivers/scsi/mpt3sas/mpt3sas_scsih.c | 40 ++++++++++++++++++------------ 2 files changed, 54 insertions(+), 33 deletions(-) diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.c b/drivers/scsi/mpt3sas/mpt3sas_base.c index 13d6e4e..f45da9a 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_base.c +++ b/drivers/scsi/mpt3sas/mpt3sas_base.c @@ -2214,6 +2214,9 @@ _base_config_dma_addressing(struct MPT3SAS_ADAPTER *ioc, struct pci_dev *pdev) struct sysinfo s; u64 consistent_dma_mask; + if (ioc->is_mcpu_endpoint) + goto try_32bit; + if (ioc->dma_mask) consistent_dma_mask = DMA_BIT_MASK(64); else @@ -2232,6 +2235,7 @@ _base_config_dma_addressing(struct MPT3SAS_ADAPTER *ioc, struct pci_dev *pdev) } } + try_32bit: if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) { ioc->base_add_sg_single = &_base_add_sg_single_32; @@ -3887,17 +3891,21 @@ _base_allocate_memory_pools(struct MPT3SAS_ADAPTER *ioc) sg_tablesize = min_t(unsigned short, sg_tablesize, MPT_KDUMP_MIN_PHYS_SEGMENTS); - if (sg_tablesize < MPT_MIN_PHYS_SEGMENTS) - sg_tablesize = MPT_MIN_PHYS_SEGMENTS; - else if (sg_tablesize > MPT_MAX_PHYS_SEGMENTS) { - sg_tablesize = min_t(unsigned short, sg_tablesize, - SG_MAX_SEGMENTS); - pr_warn(MPT3SAS_FMT - "sg_tablesize(%u) is bigger than kernel" - " defined SG_CHUNK_SIZE(%u)\n", ioc->name, - sg_tablesize, MPT_MAX_PHYS_SEGMENTS); + if (ioc->is_mcpu_endpoint) + ioc->shost->sg_tablesize = MPT_MIN_PHYS_SEGMENTS; + else { + if (sg_tablesize < MPT_MIN_PHYS_SEGMENTS) + sg_tablesize = MPT_MIN_PHYS_SEGMENTS; + else if (sg_tablesize > MPT_MAX_PHYS_SEGMENTS) { + sg_tablesize = min_t(unsigned short, sg_tablesize, + SG_MAX_SEGMENTS); + pr_warn(MPT3SAS_FMT + "sg_tablesize(%u) is bigger than kernel " + "defined SG_CHUNK_SIZE(%u)\n", ioc->name, + sg_tablesize, MPT_MAX_PHYS_SEGMENTS); + } + ioc->shost->sg_tablesize = sg_tablesize; } - ioc->shost->sg_tablesize = sg_tablesize; ioc->internal_depth = min_t(int, (facts->HighPriorityCredit + (5)), (facts->RequestCredit / 4)); @@ -3982,13 +3990,18 @@ _base_allocate_memory_pools(struct MPT3SAS_ADAPTER *ioc) /* reply free queue sizing - taking into account for 64 FW events */ ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64; - /* calculate reply descriptor post queue depth */ - ioc->reply_post_queue_depth = ioc->hba_queue_depth + - ioc->reply_free_queue_depth + 1 ; - /* align the reply post queue on the next 16 count boundary */ - if (ioc->reply_post_queue_depth % 16) - ioc->reply_post_queue_depth += 16 - - (ioc->reply_post_queue_depth % 16); + /* mCPU manage single counters for simplicity */ + if (ioc->is_mcpu_endpoint) + ioc->reply_post_queue_depth = ioc->reply_free_queue_depth; + else { + /* calculate reply descriptor post queue depth */ + ioc->reply_post_queue_depth = ioc->hba_queue_depth + + ioc->reply_free_queue_depth + 1; + /* align the reply post queue on the next 16 count boundary */ + if (ioc->reply_post_queue_depth % 16) + ioc->reply_post_queue_depth += 16 - + (ioc->reply_post_queue_depth % 16); + } if (ioc->reply_post_queue_depth > facts->MaxReplyDescriptorPostQueueDepth) { diff --git a/drivers/scsi/mpt3sas/mpt3sas_scsih.c b/drivers/scsi/mpt3sas/mpt3sas_scsih.c index bde3c6f..5e52679 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_scsih.c +++ b/drivers/scsi/mpt3sas/mpt3sas_scsih.c @@ -10521,26 +10521,34 @@ _scsih_probe(struct pci_dev *pdev, const struct pci_device_id *id) shost->transportt = mpt3sas_transport_template; shost->unique_id = ioc->id; - if (max_sectors != 0xFFFF) { - if (max_sectors < 64) { - shost->max_sectors = 64; - pr_warn(MPT3SAS_FMT "Invalid value %d passed " \ - "for max_sectors, range is 64 to 32767. Assigning " - "value of 64.\n", ioc->name, max_sectors); - } else if (max_sectors > 32767) { - shost->max_sectors = 32767; - pr_warn(MPT3SAS_FMT "Invalid value %d passed " \ - "for max_sectors, range is 64 to 32767. Assigning " - "default value of 32767.\n", ioc->name, - max_sectors); - } else { - shost->max_sectors = max_sectors & 0xFFFE; - pr_info(MPT3SAS_FMT + if (ioc->is_mcpu_endpoint) { + /* mCPU MPI support 64K max IO */ + shost->max_sectors = 128; + pr_info(MPT3SAS_FMT "The max_sectors value is set to %d\n", ioc->name, shost->max_sectors); + } else { + if (max_sectors != 0xFFFF) { + if (max_sectors < 64) { + shost->max_sectors = 64; + pr_warn(MPT3SAS_FMT "Invalid value %d passed " \ + "for max_sectors, range is 64 to 32767. " \ + "Assigning value of 64.\n", \ + ioc->name, max_sectors); + } else if (max_sectors > 32767) { + shost->max_sectors = 32767; + pr_warn(MPT3SAS_FMT "Invalid value %d passed " \ + "for max_sectors, range is 64 to 32767." \ + "Assigning default value of 32767.\n", \ + ioc->name, max_sectors); + } else { + shost->max_sectors = max_sectors & 0xFFFE; + pr_info(MPT3SAS_FMT + "The max_sectors value is set to %d\n", + ioc->name, shost->max_sectors); + } } } - /* register EEDP capabilities with SCSI layer */ if (prot_mask > 0) scsi_host_set_prot(shost, prot_mask);