From patchwork Wed May 2 15:56:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 10376077 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9B48360384 for ; Wed, 2 May 2018 16:00:48 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8E2FB28FA4 for ; Wed, 2 May 2018 16:00:48 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8325828FB6; Wed, 2 May 2018 16:00:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 45C0028FB4 for ; Wed, 2 May 2018 16:00:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751864AbeEBP51 (ORCPT ); Wed, 2 May 2018 11:57:27 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:54548 "EHLO huawei.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1751138AbeEBP51 (ORCPT ); Wed, 2 May 2018 11:57:27 -0400 Received: from DGGEMS403-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id ED3FB84BE6AC6; Wed, 2 May 2018 23:57:23 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS403-HUB.china.huawei.com (10.3.19.203) with Microsoft SMTP Server id 14.3.361.1; Wed, 2 May 2018 23:57:17 +0800 From: John Garry To: , CC: , , , John Garry , "Xiaofei Tan" Subject: [PATCH 06/11] scsi: hisi_sas: stop controller timer for reset Date: Wed, 2 May 2018 23:56:29 +0800 Message-ID: <1525276594-92173-7-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1525276594-92173-1-git-send-email-john.garry@huawei.com> References: <1525276594-92173-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We should only have the timer enabled after PHY up after controller reset, so disable prior to reset. Signed-off-by: John Garry Signed-off-by: Xiaofei Tan --- drivers/scsi/hisi_sas/hisi_sas_main.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/scsi/hisi_sas/hisi_sas_main.c b/drivers/scsi/hisi_sas/hisi_sas_main.c index 24416bb..1f27f84 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_main.c +++ b/drivers/scsi/hisi_sas/hisi_sas_main.c @@ -1130,6 +1130,9 @@ static int hisi_sas_controller_reset(struct hisi_hba *hisi_hba) old_state = hisi_hba->hw->get_phys_state(hisi_hba); scsi_block_requests(shost); + if (timer_pending(&hisi_hba->timer)) + del_timer_sync(&hisi_hba->timer); + set_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags); rc = hisi_hba->hw->soft_reset(hisi_hba); if (rc) {