diff mbox series

[4/4] mpt3sas: Fix msix load balance on and off settings

Message ID 1561387376-28323-5-git-send-email-sreekanth.reddy@broadcom.com (mailing list archive)
State Mainlined
Commit eedc42a074de55a0164e722d5ca2ec4bd397b8bc
Headers show
Series mpt3sas: bug fix patches | expand

Commit Message

Sreekanth Reddy June 24, 2019, 2:42 p.m. UTC
Enable msix load balance only when combined reply queue mode
is disabled on the SAS3 and above generation HBA devices.

Earlier msix load balance used to enable if the number of online
cpus are greater than the number of MSIX vectors enabled on the HBA.
Combined reply queue mode will be disabled only on those HBA
which works in shared resources mode. i.e. on SAS3 HBAs
it will be <= 8 and on SAS35 HBA devices it will be <= 16.

- Before this patch if system has 256 logical CPU and
  HBA expose 128 MSIx vector, driver will enable msix load balance.
- After this patch if system has 256 logical CPU and
  HBA expose 128 MSIx vector, driver will disable msix load balance.
- After this patch if system has 256 logical CPU and
  HBA expose 16 MSIx vector (due to combined reply queue mode is off
  in HW), driver will enable msix load balance.

Signed-off-by: Sreekanth Reddy <sreekanth.reddy@broadcom.com>
---
 drivers/scsi/mpt3sas/mpt3sas_base.c | 23 ++++++++++++++++++-----
 1 file changed, 18 insertions(+), 5 deletions(-)
diff mbox series

Patch

diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.c b/drivers/scsi/mpt3sas/mpt3sas_base.c
index 722599a..89418b1 100644
--- a/drivers/scsi/mpt3sas/mpt3sas_base.c
+++ b/drivers/scsi/mpt3sas/mpt3sas_base.c
@@ -2884,11 +2884,9 @@  _base_assign_reply_queues(struct MPT3SAS_ADAPTER *ioc)
 
 	if (!_base_is_controller_msix_enabled(ioc))
 		return;
-	ioc->msix_load_balance = false;
-	if (ioc->reply_queue_count < num_online_cpus()) {
-		ioc->msix_load_balance = true;
+
+	if (ioc->msix_load_balance)
 		return;
-	}
 
 	memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz);
 
@@ -3060,6 +3058,8 @@  _base_enable_msix(struct MPT3SAS_ADAPTER *ioc)
 	int i, local_max_msix_vectors;
 	u8 try_msix = 0;
 
+	ioc->msix_load_balance = false;
+
 	if (msix_disable == -1 || msix_disable == 0)
 		try_msix = 1;
 
@@ -3090,7 +3090,20 @@  _base_enable_msix(struct MPT3SAS_ADAPTER *ioc)
 	else if (local_max_msix_vectors == 0)
 		goto try_ioapic;
 
-	if (ioc->msix_vector_count < ioc->cpu_count)
+	/*
+	 * Enable msix_load_balance only if combined reply queue mode is
+	 * disabled on SAS3 & above generation HBA devices.
+	 */
+	if (!ioc->combined_reply_queue &&
+	    ioc->hba_mpi_version_belonged != MPI2_VERSION) {
+		ioc->msix_load_balance = true;
+	}
+
+	/*
+	 * smp affinity setting is not need when msix load balance
+	 * is enabled.
+	 */
+	if (ioc->msix_load_balance)
 		ioc->smp_affinity_enable = 0;
 
 	r = _base_alloc_irq_vectors(ioc);