@@ -6817,7 +6817,7 @@ out_disable:
return rc;
}
-static int hpsa_allocate_cmd_pool(struct ctlr_info *h)
+static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
{
h->cmd_pool_bits = kzalloc(
DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
@@ -7347,7 +7347,7 @@ reinit_after_soft_reset:
dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
h->devname, pdev->device,
h->intr[h->intr_mode], dac ? "" : " not");
- rc = hpsa_allocate_cmd_pool(h);
+ rc = hpsa_alloc_cmd_pool(h);
if (rc)
goto clean2_and_free_irqs;
if (hpsa_allocate_sg_chain_blocks(h))
@@ -7794,7 +7794,8 @@ static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
return 0;
}
-static int hpsa_alloc_ioaccel_cmd_and_bft(struct ctlr_info *h)
+/* Allocate ioaccel1 mode command blocks and block fetch table */
+static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
{
h->ioaccel_maxsg =
readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
@@ -7833,7 +7834,8 @@ clean_up:
return 1;
}
-static int ioaccel2_alloc_cmds_and_bft(struct ctlr_info *h)
+/* Allocate ioaccel2 mode command blocks and block fetch table */
+static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
{
/* Allocate ioaccel2 mode command blocks and block fetch table */
@@ -7888,13 +7890,13 @@ static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
if (trans_support & CFGTBL_Trans_io_accel1) {
transMethod |= CFGTBL_Trans_io_accel1 |
CFGTBL_Trans_enable_directed_msix;
- if (hpsa_alloc_ioaccel_cmd_and_bft(h))
+ if (hpsa_alloc_ioaccel1_cmd_and_bft(h))
goto clean_up;
} else {
if (trans_support & CFGTBL_Trans_io_accel2) {
transMethod |= CFGTBL_Trans_io_accel2 |
CFGTBL_Trans_enable_directed_msix;
- if (ioaccel2_alloc_cmds_and_bft(h))
+ if (hpsa_alloc_ioaccel2_cmd_and_bft(h))
goto clean_up;
}
}