From patchwork Thu Jun 14 16:49:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bart Van Assche X-Patchwork-Id: 10464887 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 83E1960348 for ; Thu, 14 Jun 2018 16:49:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7447328A40 for ; Thu, 14 Jun 2018 16:49:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 68E6228A5E; Thu, 14 Jun 2018 16:49:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 03FC628789 for ; Thu, 14 Jun 2018 16:49:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755387AbeFNQtU (ORCPT ); Thu, 14 Jun 2018 12:49:20 -0400 Received: from esa2.hgst.iphmx.com ([68.232.143.124]:12514 "EHLO esa2.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S935116AbeFNQtP (ORCPT ); Thu, 14 Jun 2018 12:49:15 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1528995185; x=1560531185; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=fIX+ZDdKzv6FTw97Np/0owYlT/UyX3AOlH1uVSN/Uqs=; b=SdEHiZx6SBX9cQidZEcg230q0oD6xtD6pNwpN6gs8Fi2DqvnrJwEeEvQ nKzf6RKwkUAz21b9pG0j2qz3C/dmgIelZcxh32Mhz+lUTWBPtln5ghqh+ ukvJeFUyrNJ1XG0DLnVC1SUetxc/+QAGn/4mu4KSBbTtiTmO+/owawlSI HFModFeFsQsDaNAezFFAENHmaMm19t19ay/zbxE3eAO2bqtSUDBZ5W6d3 1K+oi29kmUe4d0VWiYc2D7Ap8lifSct7Yf5iqawAkx8Lx8CcFmXlrBpG3 1miO1iThJZaiBbUcqnXY6HPc/HQ/OzbXjzsiNHYeogU6WbdGIhm8BMfwp w==; X-IronPort-AV: E=Sophos;i="5.51,222,1526313600"; d="scan'208";a="177371069" Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 15 Jun 2018 00:53:02 +0800 Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP; 14 Jun 2018 09:38:57 -0700 Received: from thinkpad-bart.sdcorp.global.sandisk.com ([10.111.67.248]) by uls-op-cesaip02.wdc.com with ESMTP; 14 Jun 2018 09:49:13 -0700 From: Bart Van Assche To: "Martin K . Petersen" , "James E . J . Bottomley" Cc: linux-scsi@vger.kernel.org, Bart Van Assche , Sathya Prakash , Chaitra P B , Suganath Prabu Subramani Subject: [PATCH 5/8] mpt3sas: Introduce struct mpt3sas_nvme_cmd Date: Thu, 14 Jun 2018 09:49:08 -0700 Message-Id: <20180614164911.20134-6-bart.vanassche@wdc.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180614164911.20134-1-bart.vanassche@wdc.com> References: <20180614164911.20134-1-bart.vanassche@wdc.com> Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Make _base_build_nvme_prp() easier to read by introducing a structure to access NVMe command fields. Signed-off-by: Bart Van Assche Cc: Sathya Prakash Cc: Chaitra P B Cc: Suganath Prabu Subramani Reviewed-by: Johannes Thumshirn --- drivers/scsi/mpt3sas/mpt3sas_base.c | 13 ++++--------- drivers/scsi/mpt3sas/mpt3sas_base.h | 7 +++++-- 2 files changed, 9 insertions(+), 11 deletions(-) diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.c b/drivers/scsi/mpt3sas/mpt3sas_base.c index 67e1b603f287..d681e4f2691a 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_base.c +++ b/drivers/scsi/mpt3sas/mpt3sas_base.c @@ -1834,6 +1834,8 @@ _base_build_nvme_prp(struct MPT3SAS_ADAPTER *ioc, u16 smid, u32 offset, entry_len; u32 page_mask_result, page_mask; size_t length; + struct mpt3sas_nvme_cmd *nvme_cmd = + (void *)nvme_encap_request->NVMe_Command; /* * Not all commands require a data transfer. If no data, just return @@ -1841,15 +1843,8 @@ _base_build_nvme_prp(struct MPT3SAS_ADAPTER *ioc, u16 smid, */ if (!data_in_sz && !data_out_sz) return; - /* - * Set pointers to PRP1 and PRP2, which are in the NVMe command. - * PRP1 is located at a 24 byte offset from the start of the NVMe - * command. Then set the current PRP entry pointer to PRP1. - */ - prp1_entry = (__le64 *)(nvme_encap_request->NVMe_Command + - NVME_CMD_PRP1_OFFSET); - prp2_entry = (__le64 *)(nvme_encap_request->NVMe_Command + - NVME_CMD_PRP2_OFFSET); + prp1_entry = &nvme_cmd->prp1; + prp2_entry = &nvme_cmd->prp2; prp_entry = prp1_entry; /* * For the PRP entries, use the specially allocated buffer of diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.h b/drivers/scsi/mpt3sas/mpt3sas_base.h index f02974c0be4a..c6c36750deaa 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_base.h +++ b/drivers/scsi/mpt3sas/mpt3sas_base.h @@ -143,14 +143,17 @@ * NVMe defines */ #define NVME_PRP_SIZE 8 /* PRP size */ -#define NVME_CMD_PRP1_OFFSET 24 /* PRP1 offset in NVMe cmd */ -#define NVME_CMD_PRP2_OFFSET 32 /* PRP2 offset in NVMe cmd */ #define NVME_ERROR_RESPONSE_SIZE 16 /* Max NVME Error Response */ #define NVME_TASK_ABORT_MIN_TIMEOUT 6 #define NVME_TASK_ABORT_MAX_TIMEOUT 60 #define NVME_TASK_MNGT_CUSTOM_MASK (0x0010) #define NVME_PRP_PAGE_SIZE 4096 /* Page size */ +struct mpt3sas_nvme_cmd { + u8 rsvd[24]; + __le64 prp1; + __le64 prp2; +}; /* * reset phases