From patchwork Tue Nov 5 00:42:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bart Van Assche X-Patchwork-Id: 11226771 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A3E1B15AB for ; Tue, 5 Nov 2019 00:42:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8BC9420848 for ; Tue, 5 Nov 2019 00:42:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730136AbfKEAml (ORCPT ); Mon, 4 Nov 2019 19:42:41 -0500 Received: from mail-pg1-f196.google.com ([209.85.215.196]:34629 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729976AbfKEAmk (ORCPT ); Mon, 4 Nov 2019 19:42:40 -0500 Received: by mail-pg1-f196.google.com with SMTP id e4so12764167pgs.1 for ; Mon, 04 Nov 2019 16:42:38 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/O69Oswjk7mITYAUyiLP/X3i/UV2QFWRTZ7Ai1xZSXk=; b=APp/o8v3zt4EZbQeG+toFJ8IVhCIdFS21+aMRjrE6aRaYH8FATvEvGCPMgQESzDkxP cqW0B5RBWg4PBCkSo5X4u0G/H868fZimamKegLBEJXCVUSTgmput3JR3lBFLX32E2X8w bAW+VUPnNj2QEvTmB1QlfNUFbtLMRacp9toKdr16F8acy/g+SK2Tr7AHusdNElU48xbC +0yWubRegeTPLizChs+cNBjwSuSktV5bd0pv7oe+6N8ztY7aJVi2UXtl5WPSClJbX3xV FHbglJ3i8aVixzLFEEDSHZYtSjkphiYr6G7MebDKoTP+DRfYTmE+kH95FzgqyH78b+aW 9ikA== X-Gm-Message-State: APjAAAW6IF7UmLC2Zv6L0N3OMjbpFVv49lHWMVYpaOyn5Gin2zw4QqxQ r1SCmiUBByXIig4Tjb7XEaQ= X-Google-Smtp-Source: APXvYqzE3GG4XwFjwFg/PlYKTTj5ZR82zwVWHwEvdy+PRYfXVAH92xq0T7kgHONHdQvTCH974cLlIQ== X-Received: by 2002:a65:480d:: with SMTP id h13mr33433341pgs.46.1572914558125; Mon, 04 Nov 2019 16:42:38 -0800 (PST) Received: from desktop-bart.svl.corp.google.com ([2620:15c:2cd:202:4308:52a3:24b6:2c60]) by smtp.gmail.com with ESMTPSA id a21sm4235449pjv.20.2019.11.04.16.42.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Nov 2019 16:42:37 -0800 (PST) From: Bart Van Assche To: Avri Altman , "James E . J . Bottomley" Cc: "Martin K . Petersen" , linux-scsi@vger.kernel.org, Christoph Hellwig , Bart Van Assche , Yaniv Gardi , Subhash Jadavani , Stanley Chu , Tomas Winkler Subject: [PATCH RFC v2 4/5] ufs: Use blk_{get,put}_request() to allocate and free TMFs Date: Mon, 4 Nov 2019 16:42:25 -0800 Message-Id: <20191105004226.232635-5-bvanassche@acm.org> X-Mailer: git-send-email 2.24.0.rc1.363.gb1bccd3e3d-goog In-Reply-To: <20191105004226.232635-1-bvanassche@acm.org> References: <20191105004226.232635-1-bvanassche@acm.org> MIME-Version: 1.0 Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Manage TMF tags with blk_{get,put}_request() instead of ufshcd_get_tm_free_slot() / ufshcd_put_tm_slot(). Store a per-request completion pointer in request.end_io_data instead of using a waitqueue to report TMF completion. Cc: Yaniv Gardi Cc: Subhash Jadavani Cc: Stanley Chu Cc: Avri Altman Cc: Tomas Winkler Signed-off-by: Bart Van Assche --- drivers/scsi/ufs/ufshcd.c | 84 +++++++++++++++++---------------------- drivers/scsi/ufs/ufshcd.h | 9 ----- 2 files changed, 36 insertions(+), 57 deletions(-) diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index c8124db6665e..a2100f9d51a3 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -645,40 +645,6 @@ static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp) return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS; } -/** - * ufshcd_get_tm_free_slot - get a free slot for task management request - * @hba: per adapter instance - * @free_slot: pointer to variable with available slot value - * - * Get a free tag and lock it until ufshcd_put_tm_slot() is called. - * Returns 0 if free slot is not available, else return 1 with tag value - * in @free_slot. - */ -static bool ufshcd_get_tm_free_slot(struct ufs_hba *hba, int *free_slot) -{ - int tag; - bool ret = false; - - if (!free_slot) - goto out; - - do { - tag = find_first_zero_bit(&hba->tm_slots_in_use, hba->nutmrs); - if (tag >= hba->nutmrs) - goto out; - } while (test_and_set_bit_lock(tag, &hba->tm_slots_in_use)); - - *free_slot = tag; - ret = true; -out: - return ret; -} - -static inline void ufshcd_put_tm_slot(struct ufs_hba *hba, int slot) -{ - clear_bit_unlock(slot, &hba->tm_slots_in_use); -} - /** * ufshcd_utrl_clear - Clear a bit in UTRLCLR register * @hba: per adapter instance @@ -5519,17 +5485,35 @@ static void ufshcd_check_errors(struct ufs_hba *hba) */ } +struct ctm_info { + struct ufs_hba *hba; + unsigned long pending; +}; + +static bool ufshcd_compl_tm(struct request *req, void *priv, bool reserved) +{ + const struct ctm_info *const ci = priv; + struct completion *c; + + if (!reserved || test_bit(req->tag, &ci->pending)) + return true; + c = req->end_io_data; + if (c) + complete(c); + return true; +} + /** * ufshcd_tmc_handler - handle task management function completion * @hba: per adapter instance */ static void ufshcd_tmc_handler(struct ufs_hba *hba) { - u32 tm_doorbell; + struct request_queue *q = hba->tag_alloc_queue; + struct ctm_info ci = { .hba = hba }; - tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL); - hba->tm_condition = tm_doorbell ^ hba->outstanding_tasks; - wake_up(&hba->tm_wq); + ci.pending = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL); + blk_mq_tagset_busy_iter(q->tag_set, ufshcd_compl_tm, &ci); } /** @@ -5622,7 +5606,10 @@ static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag) static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba, struct utp_task_req_desc *treq, u8 tm_function) { + struct request_queue *q = hba->tag_alloc_queue; struct Scsi_Host *host = hba->host; + DECLARE_COMPLETION_ONSTACK(wait); + struct request *req; unsigned long flags; int free_slot, task_tag, err; @@ -5631,7 +5618,10 @@ static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba, * Even though we use wait_event() which sleeps indefinitely, * the maximum wait time is bounded by %TM_CMD_TIMEOUT. */ - wait_event(hba->tm_tag_wq, ufshcd_get_tm_free_slot(hba, &free_slot)); + req = blk_get_request(q, REQ_OP_DRV_OUT, BLK_MQ_REQ_RESERVED); + req->end_io_data = &wait; + free_slot = req->tag; + WARN_ON_ONCE(free_slot < 0 || free_slot >= hba->nutmrs); ufshcd_hold(hba, false); spin_lock_irqsave(host->host_lock, flags); @@ -5657,10 +5647,14 @@ static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba, ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_send"); /* wait until the task management command is completed */ - err = wait_event_timeout(hba->tm_wq, - test_bit(free_slot, &hba->tm_condition), + err = wait_for_completion_io_timeout(&wait, msecs_to_jiffies(TM_CMD_TIMEOUT)); if (!err) { + /* + * Make sure that ufshcd_compl_tm() does not trigger a + * use-after-free. + */ + req->end_io_data = NULL; ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete_err"); dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n", __func__, tm_function); @@ -5679,9 +5673,7 @@ static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba, __clear_bit(free_slot, &hba->outstanding_tasks); spin_unlock_irqrestore(hba->host->host_lock, flags); - clear_bit(free_slot, &hba->tm_condition); - ufshcd_put_tm_slot(hba, free_slot); - wake_up(&hba->tm_tag_wq); + blk_put_request(req); ufshcd_release(hba); return err; @@ -8315,10 +8307,6 @@ int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq) hba->max_pwr_info.is_valid = false; - /* Initailize wait queue for task management */ - init_waitqueue_head(&hba->tm_wq); - init_waitqueue_head(&hba->tm_tag_wq); - /* Initialize work queues */ INIT_WORK(&hba->eh_work, ufshcd_err_handler); INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler); diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h index 8fa33fb71237..0d8867db43db 100644 --- a/drivers/scsi/ufs/ufshcd.h +++ b/drivers/scsi/ufs/ufshcd.h @@ -493,11 +493,7 @@ struct ufs_stats { * @irq: Irq number of the controller * @active_uic_cmd: handle of active UIC command * @uic_cmd_mutex: mutex for uic command - * @tm_wq: wait queue for task management - * @tm_tag_wq: wait queue for free task management slots - * @tm_slots_in_use: bit map of task management request slots in use * @pwr_done: completion for power mode change - * @tm_condition: condition variable for task management * @ufshcd_state: UFSHCD states * @eh_flags: Error handling flags * @intr_mask: Interrupt Mask Bits @@ -641,11 +637,6 @@ struct ufs_hba { /* Device deviations from standard UFS device spec. */ unsigned int dev_quirks; - wait_queue_head_t tm_wq; - wait_queue_head_t tm_tag_wq; - unsigned long tm_condition; - unsigned long tm_slots_in_use; - struct uic_command *active_uic_cmd; struct mutex uic_cmd_mutex; struct completion *uic_async_done;