From patchwork Thu Mar 12 11:09:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanley Chu X-Patchwork-Id: 11433883 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C08A713B1 for ; Thu, 12 Mar 2020 11:09:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 961472067C for ; Thu, 12 Mar 2020 11:09:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="raoRhFSh" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726986AbgCLLJR (ORCPT ); Thu, 12 Mar 2020 07:09:17 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:9062 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726725AbgCLLJQ (ORCPT ); Thu, 12 Mar 2020 07:09:16 -0400 X-UUID: 42ed6ee42ad44e1aaa72c5a7344fd513-20200312 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=4SVFDx1dUwhWROvYtY0dTPYSsP2l15nHohTxw716oJc=; b=raoRhFShaI3fvFgqXGZ9zcADKs3YbDzar/bElNspPbib4UnS74pyakDo02ezSP7/ibi7pflz+/mErovvfzzHEQEsr/517N5QXjo1HbgDp6uH93UkzYAEB8CsddiLhol8i+mz5bodM9VRcj3sNpih556IY+cqN6FuQtQg5yJJ6tM=; X-UUID: 42ed6ee42ad44e1aaa72c5a7344fd513-20200312 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 119174148; Thu, 12 Mar 2020 19:09:12 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 12 Mar 2020 19:06:22 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 12 Mar 2020 19:08:51 +0800 From: Stanley Chu To: , , , , CC: , , , , , , , , , , , , Stanley Chu Subject: [PATCH v2 6/8] scsi: ufs: allow customized delay for host enabling Date: Thu, 12 Mar 2020 19:09:06 +0800 Message-ID: <20200312110908.14895-7-stanley.chu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200312110908.14895-1-stanley.chu@mediatek.com> References: <20200312110908.14895-1-stanley.chu@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 3DF717522B25820C5912D4A86210E1EA0937932E319A8C75A401C2BEAEDD37B12000:8 X-MTK: N Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Currently a 1 ms delay is applied before polling CONTROLLER_ENABLE bit. This delay may not be required or can be changed in different controllers. Make the delay as a changeable value in struct ufs_hba to allow it customized by vendors. Signed-off-by: Stanley Chu Reviewed-by: Can Guo --- drivers/scsi/ufs/ufshcd.c | 3 ++- drivers/scsi/ufs/ufshcd.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index ce65d321a73f..dcbf45d547d8 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -4298,7 +4298,7 @@ int ufshcd_hba_enable(struct ufs_hba *hba) * instruction might be read back. * This delay can be changed based on the controller. */ - ufshcd_wait_us(1000, 100, true); + ufshcd_wait_us(hba->hba_enable_delay_us, 100, true); /* wait for the host controller to complete initialization */ retry = 10; @@ -8418,6 +8418,7 @@ int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq) hba->mmio_base = mmio_base; hba->irq = irq; + hba->hba_enable_delay_us = 1000; err = ufshcd_hba_init(hba); if (err) diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h index 4683e7bf6640..269ddb92bb55 100644 --- a/drivers/scsi/ufs/ufshcd.h +++ b/drivers/scsi/ufs/ufshcd.h @@ -653,6 +653,7 @@ struct ufs_hba { u32 eh_flags; u32 intr_mask; u16 ee_ctrl_mask; + u16 hba_enable_delay_us; bool is_powered; /* Work Queues */