From patchwork Thu Mar 12 11:09:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanley Chu X-Patchwork-Id: 11433897 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 00E5E92A for ; Thu, 12 Mar 2020 11:09:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D614A2073B for ; Thu, 12 Mar 2020 11:09:42 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="Se2jnFt9" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727063AbgCLLJR (ORCPT ); Thu, 12 Mar 2020 07:09:17 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:35775 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726000AbgCLLJQ (ORCPT ); Thu, 12 Mar 2020 07:09:16 -0400 X-UUID: 461e0c2315674da0a5e2500458926cc9-20200312 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=Uk2XDwY8UpUa34jOh1gmZh106hPeM2dU3/2C5J19+W8=; b=Se2jnFt9fqzF3D/rREdZxA+RqLBuAY67IHthXjKeSppqy8DlUlIoXXgDjUjURek0yHbRyiKKqodwE6x8Uk77bLeJy+9wnNmvHIdZNVnE4hJnEGN9w2n6FpjZKINALhznK7perd1pp7wvSZGOphzjMqIS3jzbYI/VV1JLgCKmboI=; X-UUID: 461e0c2315674da0a5e2500458926cc9-20200312 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 112562526; Thu, 12 Mar 2020 19:09:12 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs05n1.mediatek.inc (172.21.101.15) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 12 Mar 2020 19:07:57 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 12 Mar 2020 19:08:51 +0800 From: Stanley Chu To: , , , , CC: , , , , , , , , , , , , Stanley Chu Subject: [PATCH v2 8/8] scsi: ufs-mediatek: customize the delay for host enabling Date: Thu, 12 Mar 2020 19:09:08 +0800 Message-ID: <20200312110908.14895-9-stanley.chu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200312110908.14895-1-stanley.chu@mediatek.com> References: <20200312110908.14895-1-stanley.chu@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org MediaTek platform and UFS controller can dynamically customize the delay for host enabling according to different scenarios. For example, for host initialization with low-level MPHY calibration required, longer delay shall be expected. But the delay could be removed if such MPHY calibration can be skipped, like resume flow. Signed-off-by: Stanley Chu --- arch/arm64/configs/defconfig | 1 + drivers/scsi/ufs/ufs-mediatek.c | 14 ++++++++++++++ 2 files changed, 15 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 0a8a2ad94bef..9306f658a6cd 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -235,6 +235,7 @@ CONFIG_SCSI_MPT3SAS=m CONFIG_SCSI_UFSHCD=y CONFIG_SCSI_UFSHCD_PLATFORM=y CONFIG_SCSI_UFS_QCOM=m +CONFIG_SCSI_UFS_MEDIATEK=m CONFIG_SCSI_UFS_HISI=y CONFIG_ATA=y CONFIG_SATA_AHCI=y diff --git a/drivers/scsi/ufs/ufs-mediatek.c b/drivers/scsi/ufs/ufs-mediatek.c index 0ff6781654fd..6f437f0091bf 100644 --- a/drivers/scsi/ufs/ufs-mediatek.c +++ b/drivers/scsi/ufs/ufs-mediatek.c @@ -71,6 +71,19 @@ static void ufs_mtk_cfg_unipro_cg(struct ufs_hba *hba, bool enable) } } +static int ufs_mtk_hce_enable_notify(struct ufs_hba *hba, + enum ufs_notify_change_status status) +{ + if (status == PRE_CHANGE) { + if (hba->pm_op_in_progress) + hba->hba_enable_delay_us = 0; + else + hba->hba_enable_delay_us = 100; + } + + return 0; +} + static int ufs_mtk_bind_mphy(struct ufs_hba *hba) { struct ufs_mtk_host *host = ufshcd_get_variant(hba); @@ -552,6 +565,7 @@ static struct ufs_hba_variant_ops ufs_hba_mtk_vops = { .name = "mediatek.ufshci", .init = ufs_mtk_init, .setup_clocks = ufs_mtk_setup_clocks, + .hce_enable_notify = ufs_mtk_hce_enable_notify, .link_startup_notify = ufs_mtk_link_startup_notify, .pwr_change_notify = ufs_mtk_pwr_change_notify, .apply_dev_quirks = ufs_mtk_apply_dev_quirks,