| Message ID | 20200417175944.47189-9-alim.akhtar@samsung.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | exynos-ufs: Add support for UFS HCI | expand |
Hi Rob Request to comment on this dt-bindings documentation. Thanks On Fri, Apr 17, 2020 at 11:41 PM Alim Akhtar <alim.akhtar@samsung.com> wrote: > > This patch adds DT binding for samsung ufs hci > > Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> > --- > .../bindings/ufs/samsung,exynos-ufs.yaml | 93 +++++++++++++++++++ > 1 file changed, 93 insertions(+) > create mode 100644 Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml > > diff --git a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml > new file mode 100644 > index 000000000000..954338b7f37d > --- /dev/null > +++ b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml > @@ -0,0 +1,93 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/ufs/samsung,exynos-ufs.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Samsung SoC series UFS host controller Device Tree Bindings > + > +maintainers: > + - Alim Akhtar <alim.akhtar@samsung.com> > + > +description: | > + Each Samsung UFS host controller instance should have its own node. > + This binding define Samsung specific binding other then what is used > + in the common ufshcd bindings > + [1] Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt > + > +properties: > + > + compatible: > + enum: > + - samsung,exynos7-ufs > + > + reg: > + items: > + - description: HCI register > + - description: vendor specific register > + - description: unipro register > + - description: UFS protector register > + > + reg-names: > + items: > + - const: hci > + - const: vs_hci > + - const: unipro > + - const: ufsp > + > + clocks: > + maxItems: 2 > + items: > + - description: ufs link core clock > + - description: unipro main clock > + > + clock-names: > + maxItems: 2 > + items: > + - const: core_clk > + - const: sclk_unipro_main > + > + interrupts: > + items: > + - description: interrupt signal for various ufshc status > + > + phys: > + maxItems: 1 > + description: > + phandle of the ufs phy node > + > + phy-names: > + const: ufs-phy > + > +required: > + - compatible > + - reg > + - interrupts > + - phys > + - phy-names > + - clocks > + - clock-names > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/clock/exynos7-clk.h> > + > + ufs: ufs@15570000 { > + compatible = "samsung,exynos7-ufs"; > + reg = <0x15570000 0x100>, > + <0x15570100 0x100>, > + <0x15571000 0x200>, > + <0x15572000 0x300>; > + reg-names = "hci", "vs_hci", "unipro", "ufsp"; > + interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clock_fsys1 ACLK_UFS20_LINK>, > + <&clock_fsys1 SCLK_UFSUNIPRO20_USER>; > + clock-names = "core_clk", "sclk_unipro_main"; > + pinctrl-names = "default"; > + pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>; > + pclk-freq-avail-range = <70000000 133000000>; > + phys = <&ufs_phy>; > + phy-names = "ufs-phy"; > + }; > +... > -- > 2.17.1 >
diff --git a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml new file mode 100644 index 000000000000..954338b7f37d --- /dev/null +++ b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml @@ -0,0 +1,93 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ufs/samsung,exynos-ufs.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung SoC series UFS host controller Device Tree Bindings + +maintainers: + - Alim Akhtar <alim.akhtar@samsung.com> + +description: | + Each Samsung UFS host controller instance should have its own node. + This binding define Samsung specific binding other then what is used + in the common ufshcd bindings + [1] Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt + +properties: + + compatible: + enum: + - samsung,exynos7-ufs + + reg: + items: + - description: HCI register + - description: vendor specific register + - description: unipro register + - description: UFS protector register + + reg-names: + items: + - const: hci + - const: vs_hci + - const: unipro + - const: ufsp + + clocks: + maxItems: 2 + items: + - description: ufs link core clock + - description: unipro main clock + + clock-names: + maxItems: 2 + items: + - const: core_clk + - const: sclk_unipro_main + + interrupts: + items: + - description: interrupt signal for various ufshc status + + phys: + maxItems: 1 + description: + phandle of the ufs phy node + + phy-names: + const: ufs-phy + +required: + - compatible + - reg + - interrupts + - phys + - phy-names + - clocks + - clock-names + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/exynos7-clk.h> + + ufs: ufs@15570000 { + compatible = "samsung,exynos7-ufs"; + reg = <0x15570000 0x100>, + <0x15570100 0x100>, + <0x15571000 0x200>, + <0x15572000 0x300>; + reg-names = "hci", "vs_hci", "unipro", "ufsp"; + interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock_fsys1 ACLK_UFS20_LINK>, + <&clock_fsys1 SCLK_UFSUNIPRO20_USER>; + clock-names = "core_clk", "sclk_unipro_main"; + pinctrl-names = "default"; + pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>; + pclk-freq-avail-range = <70000000 133000000>; + phys = <&ufs_phy>; + phy-names = "ufs-phy"; + }; +...
This patch adds DT binding for samsung ufs hci Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> --- .../bindings/ufs/samsung,exynos-ufs.yaml | 93 +++++++++++++++++++ 1 file changed, 93 insertions(+) create mode 100644 Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml