From patchwork Mon May 11 20:09:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bart Van Assche X-Patchwork-Id: 11541645 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D81A092A for ; Mon, 11 May 2020 20:09:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C9668206F5 for ; Mon, 11 May 2020 20:09:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730927AbgEKUJ4 (ORCPT ); Mon, 11 May 2020 16:09:56 -0400 Received: from mail-pf1-f195.google.com ([209.85.210.195]:36184 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727873AbgEKUJ4 (ORCPT ); Mon, 11 May 2020 16:09:56 -0400 Received: by mail-pf1-f195.google.com with SMTP id z1so5238722pfn.3 for ; Mon, 11 May 2020 13:09:54 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HHTgIAS/UZisrDeGTFK4IPVnQikI5kG1hd7y9VNsaCI=; b=siTYst4jOObrwYJ8npzDoZw+j2dVEkhZmRLvWR0R0mFgMvh+zz2A2Zy/ndKO1FaM9N mfIIfFMx7SJ2Jxyi++fq+K/THxqlhtXLEBiJNLBuR5J/ERE56l8bCXEd9J4v8txjrXJ3 VIq77EMtBo1qbL7S69/0tMYdPcW2hapD10+KzpQ+lV1iHiNXncmhYqunSGw5JQP7QzIm UBBX+Kbm3DSPzkTTo9iYYMZYHEm9YmaO6uRJmXtmSYbI7y3asfmo1u1mKDvTv8YNewWe D9vFfIxlfUmgh/OC0xWy0wy0D1j0dqx5Fsn+1RKnXi3XgjhahUURs2rDNSqX5yK6Fwxz LnZw== X-Gm-Message-State: AGi0PuYqyZ/lkT9ZSuOteRPp9d2NbYPJE06vczIGKksCu+oaDSH/MpWV w33Z046uWj4Bwu6BZ6zR830LDFRkFm8= X-Google-Smtp-Source: APiQypIdUM4DkqcfJmdpnxPKHzSDb0eEFcwn42JJQmsh8DFK/Uamie01jBqYskGN2ZhAUqgFFi28Hw== X-Received: by 2002:a63:b11:: with SMTP id 17mr16225152pgl.3.1589227794168; Mon, 11 May 2020 13:09:54 -0700 (PDT) Received: from localhost.localdomain ([2601:647:4000:d7:c4e5:b27b:830d:5d6e]) by smtp.gmail.com with ESMTPSA id 30sm8610265pgp.38.2020.05.11.13.09.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 May 2020 13:09:53 -0700 (PDT) From: Bart Van Assche To: "Martin K . Petersen" , "James E . J . Bottomley" Cc: linux-scsi@vger.kernel.org, Bart Van Assche , Daniel Wagner , Himanshu Madhani , Hannes Reinecke , Nilesh Javali , Quinn Tran , Martin Wilck , Roman Bolshakov Subject: [PATCH v5 01/15] qla2xxx: Fix spelling of a variable name Date: Mon, 11 May 2020 13:09:32 -0700 Message-Id: <20200511200946.7675-2-bvanassche@acm.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200511200946.7675-1-bvanassche@acm.org> References: <20200511200946.7675-1-bvanassche@acm.org> MIME-Version: 1.0 Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Reviewed-by: Daniel Wagner Reviewed-by: Himanshu Madhani Reviewed-by: Hannes Reinecke Cc: Nilesh Javali Cc: Quinn Tran Cc: Martin Wilck Cc: Roman Bolshakov Signed-off-by: Bart Van Assche --- drivers/scsi/qla2xxx/qla_fw.h | 2 +- drivers/scsi/qla2xxx/qla_init.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/scsi/qla2xxx/qla_fw.h b/drivers/scsi/qla2xxx/qla_fw.h index f9bad5bd7198..b364a497e33d 100644 --- a/drivers/scsi/qla2xxx/qla_fw.h +++ b/drivers/scsi/qla2xxx/qla_fw.h @@ -1292,7 +1292,7 @@ struct device_reg_24xx { }; /* RISC-RISC semaphore register PCI offet */ #define RISC_REGISTER_BASE_OFFSET 0x7010 -#define RISC_REGISTER_WINDOW_OFFET 0x6 +#define RISC_REGISTER_WINDOW_OFFSET 0x6 /* RISC-RISC semaphore/flag register (risc address 0x7016) */ diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c index 95b6166ae0cc..f8fe0334571f 100644 --- a/drivers/scsi/qla2xxx/qla_init.c +++ b/drivers/scsi/qla2xxx/qla_init.c @@ -2861,7 +2861,7 @@ qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); - *data = RD_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET); + *data = RD_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET); } @@ -2871,7 +2871,7 @@ qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); - WRT_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET, data); + WRT_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET, data); } static void