From patchwork Fri May 29 09:23:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanley Chu X-Patchwork-Id: 11578207 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AE97892A for ; Fri, 29 May 2020 09:23:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 96C30208A7 for ; Fri, 29 May 2020 09:23:35 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="MUfbobrp" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726519AbgE2JXQ (ORCPT ); Fri, 29 May 2020 05:23:16 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:9059 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725790AbgE2JXQ (ORCPT ); Fri, 29 May 2020 05:23:16 -0400 X-UUID: 93b4a5988c9f4d6e9b86390d1bb89a48-20200529 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=uzfw9R1d1VOhip5QwrPTSrk84wKyVcP93tK5NZw6nGU=; b=MUfbobrpT7qYztbauBkf6fKsVCXZlRGY2QrZL6JkU4vH+t61Tc6JheMHNpy+4T0z/1QvwltAaVP0Ji0R2wWtMmNLH+wdWyShDdlCIt7/T+517wQJi5xxCBm44vaCwNkLaoPJWcdlWUxKq/RIdZGZpkQilKqRc7JjW1TAw5Oruoo=; X-UUID: 93b4a5988c9f4d6e9b86390d1bb89a48-20200529 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 744379384; Fri, 29 May 2020 17:23:13 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs02n1.mediatek.inc (172.21.101.77) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 29 May 2020 17:23:10 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 29 May 2020 17:23:10 +0800 From: Stanley Chu To: , , , , CC: , , , , , , , , , , , , , , , Stanley Chu Subject: [PATCH v2 1/5] scsi: ufs-mediatek: Fix imprecise waiting time for ref-clk control Date: Fri, 29 May 2020 17:23:06 +0800 Message-ID: <20200529092310.1106-2-stanley.chu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200529092310.1106-1-stanley.chu@mediatek.com> References: <20200529092310.1106-1-stanley.chu@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Currently ref-clk control timeout is implemented by Jiffies. However jiffies is not accurate enough thus "false timeout" may happen. Use more accurate delay mechanism instead, for example, ktime. Signed-off-by: Stanley Chu Reviewed-by: Andy Teng Reviewed-by: Avri Altman --- drivers/scsi/ufs/ufs-mediatek.c | 7 ++++--- drivers/scsi/ufs/ufs-mediatek.h | 2 +- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/scsi/ufs/ufs-mediatek.c b/drivers/scsi/ufs/ufs-mediatek.c index d56ce8d97d4e..523ee5573921 100644 --- a/drivers/scsi/ufs/ufs-mediatek.c +++ b/drivers/scsi/ufs/ufs-mediatek.c @@ -120,7 +120,7 @@ static int ufs_mtk_setup_ref_clk(struct ufs_hba *hba, bool on) { struct ufs_mtk_host *host = ufshcd_get_variant(hba); struct arm_smccc_res res; - unsigned long timeout; + ktime_t timeout, time_checked; u32 value; if (host->ref_clk_enabled == on) @@ -135,8 +135,9 @@ static int ufs_mtk_setup_ref_clk(struct ufs_hba *hba, bool on) } /* Wait for ack */ - timeout = jiffies + msecs_to_jiffies(REFCLK_REQ_TIMEOUT_MS); + timeout = ktime_add_us(ktime_get(), REFCLK_REQ_TIMEOUT_US); do { + time_checked = ktime_get(); value = ufshcd_readl(hba, REG_UFS_REFCLK_CTRL); /* Wait until ack bit equals to req bit */ @@ -144,7 +145,7 @@ static int ufs_mtk_setup_ref_clk(struct ufs_hba *hba, bool on) goto out; usleep_range(100, 200); - } while (time_before(jiffies, timeout)); + } while (ktime_before(time_checked, timeout)); dev_err(hba->dev, "missing ack of refclk req, reg: 0x%x\n", value); diff --git a/drivers/scsi/ufs/ufs-mediatek.h b/drivers/scsi/ufs/ufs-mediatek.h index 5bbd3e9cbae2..fc42dcbfd800 100644 --- a/drivers/scsi/ufs/ufs-mediatek.h +++ b/drivers/scsi/ufs/ufs-mediatek.h @@ -28,7 +28,7 @@ #define REFCLK_REQUEST BIT(0) #define REFCLK_ACK BIT(1) -#define REFCLK_REQ_TIMEOUT_MS 3 +#define REFCLK_REQ_TIMEOUT_US 3000 /* * Vendor specific pre-defined parameters