Message ID | 20211021073208.27582-11-njavali@marvell.com (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | qla2xxx - misc driver and EDIF bug fixes | expand |
> On Oct 21, 2021, at 2:32 AM, Nilesh Javali <njavali@marvell.com> wrote: > > From: Quinn Tran <qutran@marvell.com> > > Currently, FW limits ELS payload to FC frame size/2112. > This patch adjust memory buffer size to be able to handle > max ELS payload. > > Fixes: 84318a9f01ce ("scsi: qla2xxx: edif: Add send, receive, and accept for > auth_els") ^^^ Fixes line should be one line.. Please fix that > Signed-off-by: Quinn Tran <qutran@marvell.com> > Signed-off-by: Nilesh Javali <njavali@marvell.com> > --- > drivers/scsi/qla2xxx/qla_edif.c | 2 +- > drivers/scsi/qla2xxx/qla_edif.h | 3 ++- > drivers/scsi/qla2xxx/qla_edif_bsg.h | 2 +- > drivers/scsi/qla2xxx/qla_init.c | 4 ++++ > drivers/scsi/qla2xxx/qla_os.c | 2 +- > 5 files changed, 9 insertions(+), 4 deletions(-) > > diff --git a/drivers/scsi/qla2xxx/qla_edif.c b/drivers/scsi/qla2xxx/qla_edif.c > index bb3a1afb86a8..1ea130c61d70 100644 > --- a/drivers/scsi/qla2xxx/qla_edif.c > +++ b/drivers/scsi/qla2xxx/qla_edif.c > @@ -2375,7 +2375,7 @@ void qla24xx_auth_els(scsi_qla_host_t *vha, void **pkt, struct rsp_que **rsp) > return; > } > > - if (totlen > MAX_PAYLOAD) { > + if (totlen > ELS_MAX_PAYLOAD) { > ql_dbg(ql_dbg_edif, vha, 0x0910d, > "%s WARNING: verbose ELS frame received (totlen=%x)\n", > __func__, totlen); > diff --git a/drivers/scsi/qla2xxx/qla_edif.h b/drivers/scsi/qla2xxx/qla_edif.h > index 920b1eace40f..2517005fb08c 100644 > --- a/drivers/scsi/qla2xxx/qla_edif.h > +++ b/drivers/scsi/qla2xxx/qla_edif.h > @@ -93,7 +93,6 @@ struct sa_update_28xx { > }; > > #define NUM_ENTRIES 256 > -#define MAX_PAYLOAD 1024 > #define PUR_GET 1 > > struct dinfo { > @@ -127,6 +126,8 @@ struct enode { > } u; > }; > > +#define RX_ELS_SIZE (roundup(sizeof(struct enode) + ELS_MAX_PAYLOAD, SMP_CACHE_BYTES)) > + > #define EDIF_SESSION_DOWN(_s) \ > (qla_ini_mode_enabled(_s->vha) && (_s->disc_state == DSC_DELETE_PEND || \ > _s->disc_state == DSC_DELETED || \ > diff --git a/drivers/scsi/qla2xxx/qla_edif_bsg.h b/drivers/scsi/qla2xxx/qla_edif_bsg.h > index 58b718d35d19..53026d82ebff 100644 > --- a/drivers/scsi/qla2xxx/qla_edif_bsg.h > +++ b/drivers/scsi/qla2xxx/qla_edif_bsg.h > @@ -8,7 +8,7 @@ > #define __QLA_EDIF_BSG_H > > /* BSG Vendor specific commands */ > -#define ELS_MAX_PAYLOAD 1024 > +#define ELS_MAX_PAYLOAD 2112 > #ifndef WWN_SIZE > #define WWN_SIZE 8 > #endif > diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c > index 999e0423891c..2bc5593645ec 100644 > --- a/drivers/scsi/qla2xxx/qla_init.c > +++ b/drivers/scsi/qla2xxx/qla_init.c > @@ -4486,6 +4486,10 @@ qla2x00_init_rings(scsi_qla_host_t *vha) > (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); > } > > + /* ELS pass through payload is limit by frame size. */ > + if (ha->flags.edif_enabled) > + mid_init_cb->init_cb.frame_payload_size = cpu_to_le16(ELS_MAX_PAYLOAD); > + > rval = qla2x00_init_firmware(vha, ha->init_cb_size); > next_check: > if (rval) { > diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c > index df0e46ef3e96..814d082491af 100644 > --- a/drivers/scsi/qla2xxx/qla_os.c > +++ b/drivers/scsi/qla2xxx/qla_os.c > @@ -4352,7 +4352,7 @@ qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len, > > /* allocate the purex dma pool */ > ha->purex_dma_pool = dma_pool_create(name, &ha->pdev->dev, > - MAX_PAYLOAD, 8, 0); > + ELS_MAX_PAYLOAD, 8, 0); > > if (!ha->purex_dma_pool) { > ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b, > -- > 2.19.0.rc0 > Reviewed-by: Himanshu Madhani <himanshu.madhani@oracle.com> -- Himanshu Madhani Oracle Linux Engineering
diff --git a/drivers/scsi/qla2xxx/qla_edif.c b/drivers/scsi/qla2xxx/qla_edif.c index bb3a1afb86a8..1ea130c61d70 100644 --- a/drivers/scsi/qla2xxx/qla_edif.c +++ b/drivers/scsi/qla2xxx/qla_edif.c @@ -2375,7 +2375,7 @@ void qla24xx_auth_els(scsi_qla_host_t *vha, void **pkt, struct rsp_que **rsp) return; } - if (totlen > MAX_PAYLOAD) { + if (totlen > ELS_MAX_PAYLOAD) { ql_dbg(ql_dbg_edif, vha, 0x0910d, "%s WARNING: verbose ELS frame received (totlen=%x)\n", __func__, totlen); diff --git a/drivers/scsi/qla2xxx/qla_edif.h b/drivers/scsi/qla2xxx/qla_edif.h index 920b1eace40f..2517005fb08c 100644 --- a/drivers/scsi/qla2xxx/qla_edif.h +++ b/drivers/scsi/qla2xxx/qla_edif.h @@ -93,7 +93,6 @@ struct sa_update_28xx { }; #define NUM_ENTRIES 256 -#define MAX_PAYLOAD 1024 #define PUR_GET 1 struct dinfo { @@ -127,6 +126,8 @@ struct enode { } u; }; +#define RX_ELS_SIZE (roundup(sizeof(struct enode) + ELS_MAX_PAYLOAD, SMP_CACHE_BYTES)) + #define EDIF_SESSION_DOWN(_s) \ (qla_ini_mode_enabled(_s->vha) && (_s->disc_state == DSC_DELETE_PEND || \ _s->disc_state == DSC_DELETED || \ diff --git a/drivers/scsi/qla2xxx/qla_edif_bsg.h b/drivers/scsi/qla2xxx/qla_edif_bsg.h index 58b718d35d19..53026d82ebff 100644 --- a/drivers/scsi/qla2xxx/qla_edif_bsg.h +++ b/drivers/scsi/qla2xxx/qla_edif_bsg.h @@ -8,7 +8,7 @@ #define __QLA_EDIF_BSG_H /* BSG Vendor specific commands */ -#define ELS_MAX_PAYLOAD 1024 +#define ELS_MAX_PAYLOAD 2112 #ifndef WWN_SIZE #define WWN_SIZE 8 #endif diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c index 999e0423891c..2bc5593645ec 100644 --- a/drivers/scsi/qla2xxx/qla_init.c +++ b/drivers/scsi/qla2xxx/qla_init.c @@ -4486,6 +4486,10 @@ qla2x00_init_rings(scsi_qla_host_t *vha) (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); } + /* ELS pass through payload is limit by frame size. */ + if (ha->flags.edif_enabled) + mid_init_cb->init_cb.frame_payload_size = cpu_to_le16(ELS_MAX_PAYLOAD); + rval = qla2x00_init_firmware(vha, ha->init_cb_size); next_check: if (rval) { diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c index df0e46ef3e96..814d082491af 100644 --- a/drivers/scsi/qla2xxx/qla_os.c +++ b/drivers/scsi/qla2xxx/qla_os.c @@ -4352,7 +4352,7 @@ qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len, /* allocate the purex dma pool */ ha->purex_dma_pool = dma_pool_create(name, &ha->pdev->dev, - MAX_PAYLOAD, 8, 0); + ELS_MAX_PAYLOAD, 8, 0); if (!ha->purex_dma_pool) { ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,