From patchwork Tue Sep 13 12:05:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sreekanth Reddy X-Patchwork-Id: 12974703 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E67BCC6FA82 for ; Tue, 13 Sep 2022 11:52:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231963AbiIMLv7 (ORCPT ); Tue, 13 Sep 2022 07:51:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45860 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231827AbiIMLvy (ORCPT ); Tue, 13 Sep 2022 07:51:54 -0400 Received: from mail-pf1-x42f.google.com (mail-pf1-x42f.google.com [IPv6:2607:f8b0:4864:20::42f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 055E45AC53 for ; Tue, 13 Sep 2022 04:51:54 -0700 (PDT) Received: by mail-pf1-x42f.google.com with SMTP id y127so11520680pfy.5 for ; Tue, 13 Sep 2022 04:51:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:from:to:cc:subject:date; bh=gvCDaxDhUq4mcgLUXno0g7d85tTxqPv/78wOvbhemRc=; b=WG9GYaLst3gJD7CGd0EaRuPlVGYCg3iviPT9ejnMGm/SEo8lbyymxxVNNecYZr7f2x wNbjlYUEul2HL6dl3a8oxo37J+a9fnslk7S5UNxDgzPMPHQSOr27pBxPsTxKEdgDHLyL RMXfdeXGdJlW+UaitD9Gt3eVS/GLo8Q5cbM14= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:x-gm-message-state:from:to:cc:subject:date; bh=gvCDaxDhUq4mcgLUXno0g7d85tTxqPv/78wOvbhemRc=; b=MvaCkppTxZ2HFvSBjSrMe99SYbH9IcQFvtLQSEEVH8fhaJTTXFuXqJqE2oeqU1ELlH UoIQMCBAsRT0432XnuK0sY/6BBsMMHahDAxsJlyy4C+Oj/j/Ta7bmNv2qFfPUi5BLizX jXF2lJw0J6ZF3donmYIJEstM8G/gKBLyDO8qSnlFsU3lZSVF/SJDvgNt30cKB12o1L30 VEUDlHiOQYCMfjEFLx4VnKMdHWv6NyVq0AHUjRkgJRTWT5+ShMOFQVrLLGlIMaA121za un2vHwmAMbE95REvkxgR6DnFU9RN++w3+Sl7aeG5wmbNHVZhWZaJUX0d4IR6514t3ii6 La+Q== X-Gm-Message-State: ACgBeo1aTUS6BoJyBfVM3cF2uVrk/CbP5dF5S7SeFRMAG1pBDJX38u6z JqB/MfBz0auPZKgnKFj4nYClAzpoOn/1afVhuSpd656zf6VLMLtT1oM1Y+P7JCW85dqiwHz84S9 8SNRSIulsZtPBMdJ8Ev6TvBv0yxV8ia0vuZIQwv0U3we1NOmOdC2g98AdzorDVByVy4MlsWyavv hoH7qOq47S X-Google-Smtp-Source: AA6agR7Sgav4s3FVByQipkTNFeTRJzfVJPm9JKKL3ZFpUWsleNKEPiB/LGcoIb4NEhvjaeXh3+hDaQ== X-Received: by 2002:a05:6a02:208:b0:438:a981:8cee with SMTP id bh8-20020a056a02020800b00438a9818ceemr15425749pgb.536.1663069912579; Tue, 13 Sep 2022 04:51:52 -0700 (PDT) Received: from dhcp-10-123-20-36.dhcp.broadcom.net ([192.19.234.250]) by smtp.gmail.com with ESMTPSA id r2-20020aa79ec2000000b00545f5046372sm1692151pfq.208.2022.09.13.04.51.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Sep 2022 04:51:51 -0700 (PDT) From: Sreekanth Reddy To: linux-scsi@vger.kernel.org Cc: martin.petersen@oracle.com, Sreekanth Reddy Subject: [PATCH 1/1] mpt3sas: Fix return value check of dma_get_required_mask Date: Tue, 13 Sep 2022 17:35:38 +0530 Message-Id: <20220913120538.18759-2-sreekanth.reddy@broadcom.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220913120538.18759-1-sreekanth.reddy@broadcom.com> References: <20220913120538.18759-1-sreekanth.reddy@broadcom.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Fix the incorrect return value check of dma_get_required_mask(). Due to this incorrect check, the driver was always setting the dma mask to 63 bit. Fixes: ba27c5cf286d ("scsi: mpt3sas: Don't change the DMA coherent mask after allocations") Signed-off-by: Sreekanth Reddy --- drivers/scsi/mpt3sas/mpt3sas_base.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.c b/drivers/scsi/mpt3sas/mpt3sas_base.c index f8a3b0d..c6366ce 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_base.c +++ b/drivers/scsi/mpt3sas/mpt3sas_base.c @@ -2993,7 +2993,7 @@ _base_config_dma_addressing(struct MPT3SAS_ADAPTER *ioc, struct pci_dev *pdev) u64 coherent_dma_mask, dma_mask; if (ioc->is_mcpu_endpoint || sizeof(dma_addr_t) == 4 || - dma_get_required_mask(&pdev->dev) <= 32) { + dma_get_required_mask(&pdev->dev) <= DMA_BIT_MASK(32)) { ioc->dma_mask = 32; coherent_dma_mask = dma_mask = DMA_BIT_MASK(32); /* Set 63 bit DMA mask for all SAS3 and SAS35 controllers */