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[73.214.169.22]) by smtp.gmail.com with ESMTPSA id i15-20020a05620a248f00b006fa9d101775sm236022qkn.33.2022.11.17.02.50.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Nov 2022 02:50:29 -0800 (PST) From: Brian Masney To: andersson@kernel.org Cc: agross@kernel.org, konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, jejb@linux.ibm.com, martin.petersen@oracle.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org Subject: [PATCH 2/2] arm64: dts: qcom: sc8280xp: add interconnect properties to ufs nodes Date: Thu, 17 Nov 2022 05:49:57 -0500 Message-Id: <20221117104957.254648-3-bmasney@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221117104957.254648-1-bmasney@redhat.com> References: <20221117104957.254648-1-bmasney@redhat.com> MIME-Version: 1.0 Content-type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Add the missing interconnects and interconnect-names properties to the ufs_mem_hc and ufs_card_hc nodes. Signed-off-by: Brian Masney --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 6bc12e507d21..17c8dc8d4767 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -856,6 +856,10 @@ ufs_mem_hc: ufs@1d84000 { iommus = <&apps_smmu 0xe0 0x0>; + interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_UFS_MEM_CFG 0>; + interconnect-names = "ufs-ddr", "cpu-ufs"; + clocks = <&gcc GCC_UFS_PHY_AXI_CLK>, <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, <&gcc GCC_UFS_PHY_AHB_CLK>, @@ -924,6 +928,10 @@ ufs_card_hc: ufs@1da4000 { iommus = <&apps_smmu 0x4a0 0x0>; + interconnects = <&aggre2_noc MASTER_UFS_CARD 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_UFS_CARD_CFG 0>; + interconnect-names = "ufs-ddr", "cpu-ufs"; + clocks = <&gcc GCC_UFS_CARD_AXI_CLK>, <&gcc GCC_AGGRE_UFS_CARD_AXI_CLK>, <&gcc GCC_UFS_CARD_AHB_CLK>,