From patchwork Wed Jul 12 10:32:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13316126 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EEBD4EB64D9 for ; Wed, 12 Jul 2023 10:55:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232714AbjGLKzC (ORCPT ); Wed, 12 Jul 2023 06:55:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36356 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232671AbjGLKy6 (ORCPT ); Wed, 12 Jul 2023 06:54:58 -0400 Received: from mail-pf1-x42e.google.com (mail-pf1-x42e.google.com [IPv6:2607:f8b0:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E83BDE7E for ; Wed, 12 Jul 2023 03:54:56 -0700 (PDT) Received: by mail-pf1-x42e.google.com with SMTP id d2e1a72fcca58-66767d628e2so4670380b3a.2 for ; Wed, 12 Jul 2023 03:54:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1689159296; x=1691751296; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:resent-to:resent-message-id :resent-date:resent-from:from:to:cc:subject:date:message-id:reply-to; bh=gIJwX+rRxRyxzpkMToX1TQb/1UCAf5+FnTJGGYz4XKg=; b=udETzJFYd0i8JFTUpeh/rcNNdi4SMi4MQkl6u5zvYqE7jclKhUXNUSO9gcQaHsbcuo uRvFn77uYDdWOFBEQz/yHs8qMd4wXhhAexkoeOEbEOb4jSz8bILnnJk6SWlR1WM0ltVl kB8cljDQRkQAvOkWt6WZRTCz6kc4iPtVFTmTVMqeHSydDvMeRwSXqWx7r08fIXh01wb9 PFvzax7SNd74TifQVLhmQkWGtoyaNMFHK5DpHl/RlhiPKiYT1k1xOlZPLDmJ87OgVKaY RcyGKRPe7JxWCoc/GjAcYk6bPfffIwV42bYhbwN9FkVywOV1ZHS07ImFSep0QnllWsI3 wx6A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689159296; x=1691751296; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:resent-to:resent-message-id :resent-date:resent-from:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=gIJwX+rRxRyxzpkMToX1TQb/1UCAf5+FnTJGGYz4XKg=; b=OnP+utlseJpmXr6j3vmdgd6dcNuUIsT+1d3YJpoaTU7QZJ/r3qzRRosO4kcERACuFM BKCBn20ZFuSyH4R36luzSSoe2VsBHkzMuu5yd0lKVGUqDKUAD4jPzDmC2jVdn5UfsqEv vQvzFhZ6tIK8TL/QdMdPx6hZxK5G2y+BZztk1GUDo4daOEOqqiFH/kREg8atLrVMkOz8 uIxCTX+jNdwf73RTE/I/VO2If5/I0yefr+T5cv3yQJMmpPSKGqmfcHI9Ow9tWGYpc1Rd c3T6I0NQFF1rNVMHG2RrMb2qI1ITGyi+b9g8dzNtrD/Qv1vMACp5oo1q/+8ztuc6ONNS 9VJg== X-Gm-Message-State: ABy/qLa7Y+MbeSjBJ0/hR5mFtBFgzi9mU3dY2wJ010aW0S7DNEekbdjZ I6Kk1Ojjde2BbqdOayhwJTR9 X-Google-Smtp-Source: APBJJlFesDWZjesP4aq1d6N9/hiGp5WvygcS/5GxhshJ8U1HEU16bJp8l8f6A12tkCf0SlhX7FXwzg== X-Received: by 2002:a05:6a20:8e0b:b0:12b:f7ff:9fe5 with SMTP id y11-20020a056a208e0b00b0012bf7ff9fe5mr17377447pzj.49.1689159296435; Wed, 12 Jul 2023 03:54:56 -0700 (PDT) Received: from thinkpad ([117.207.27.131]) by smtp.gmail.com with ESMTPSA id c18-20020a170902c1d200b001b872695c1csm3634843plc.256.2023.07.12.03.54.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Jul 2023 03:54:56 -0700 (PDT) Received: from localhost.localdomain ([117.207.27.131]) by smtp.gmail.com with ESMTPSA id k15-20020aa790cf000000b00666b3706be6sm3247860pfk.107.2023.07.12.03.33.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Jul 2023 03:33:51 -0700 (PDT) From: Manivannan Sadhasivam To: vireshk@kernel.org, nm@ti.com, sboyd@kernel.org, myungjoo.ham@samsung.com, kyungmin.park@samsung.com, cw00.choi@samsung.com, andersson@kernel.org, konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, quic_asutoshd@quicinc.com, quic_cang@quicinc.com, quic_nitirawa@quicinc.com, quic_narepall@quicinc.com, quic_bhaskarv@quicinc.com, quic_richardp@quicinc.com, quic_nguyenb@quicinc.com, quic_ziqichen@quicinc.com, bmasney@redhat.com, krzysztof.kozlowski@linaro.org, Manivannan Sadhasivam Subject: [PATCH 06/14] arm64: dts: qcom: sm8250: Add OPP table support to UFSHC Date: Wed, 12 Jul 2023 16:02:01 +0530 Message-Id: <20230712103213.101770-7-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230712103213.101770-1-manivannan.sadhasivam@linaro.org> References: <20230712103213.101770-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-TUID: gbTAMaULIQVc Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org UFS host controller, when scaling gears, should choose appropriate performance state of RPMh power domain controller along with clock frequency. So let's add the OPP table support to specify both clock frequency and RPMh performance states replacing the old "freq-table-hz" property. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 39 +++++++++++++++++++++------- 1 file changed, 30 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 83ab6de459bc..72fd66db9c51 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -2194,17 +2194,38 @@ ufs_mem_hc: ufshc@1d84000 { <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; - freq-table-hz = - <37500000 300000000>, - <0 0>, - <0 0>, - <37500000 300000000>, - <0 0>, - <0 0>, - <0 0>, - <0 0>; + + operating-points-v2 = <&ufs_opp_table>; status = "disabled"; + + ufs_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-37500000 { + opp-hz = /bits/ 64 <37500000>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <37500000>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <0>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-300000000 { + opp-hz = /bits/ 64 <300000000>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <300000000>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <0>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; }; ufs_mem_phy: phy@1d87000 {