diff mbox series

[7/7] scsi: ufs: core: Make DMA mask configuration more flexible

Message ID 20241016211154.2425403-8-bvanassche@acm.org (mailing list archive)
State New
Headers show
Series UFS driver fixes and cleanups | expand

Commit Message

Bart Van Assche Oct. 16, 2024, 9:11 p.m. UTC
Replace UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS with
ufs_hba_variant_ops::set_dma_mask. Update the Renesas driver accordingly.
This patch prepares for adding 36-bit DMA support. No functionality has
been changed.

Signed-off-by: Bart Van Assche <bvanassche@acm.org>
---
 drivers/ufs/core/ufshcd.c      | 4 ++--
 drivers/ufs/host/ufs-renesas.c | 9 +++++++--
 include/ufs/ufshcd.h           | 9 +++------
 3 files changed, 12 insertions(+), 10 deletions(-)

Comments

Avri Altman Oct. 18, 2024, 6:03 a.m. UTC | #1
> Replace UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS with
> ufs_hba_variant_ops::set_dma_mask. Update the Renesas driver accordingly.
> This patch prepares for adding 36-bit DMA support. No functionality has
> been changed.
It looks like this patch belongs to a different series,
e.g. the one that adds the 36-bit DMA support.

> 
> Signed-off-by: Bart Van Assche <bvanassche@acm.org>
> ---
>  drivers/ufs/core/ufshcd.c      | 4 ++--
>  drivers/ufs/host/ufs-renesas.c | 9 +++++++--
>  include/ufs/ufshcd.h           | 9 +++------
>  3 files changed, 12 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index
> 75e00e5b3f79..c1d4a9c8480f 100644
> --- a/drivers/ufs/core/ufshcd.c
> +++ b/drivers/ufs/core/ufshcd.c
> @@ -2389,8 +2389,6 @@ static inline int ufshcd_hba_capabilities(struct
> ufs_hba *hba)
>         int err;
> 
>         hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
> -       if (hba->quirks & UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS)
> -               hba->capabilities &= ~MASK_64_ADDRESSING_SUPPORT;
> 
>         /* nutrs and nutmrs are 0 based values */
>         hba->nutrs = (hba->capabilities &
> MASK_TRANSFER_REQUESTS_SLOTS_SDB) + 1; @@ -10280,6 +10278,8 @@
> EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
>   */
>  static int ufshcd_set_dma_mask(struct ufs_hba *hba)  {
> +       if (hba->vops && hba->vops->set_dma_mask)
> +               return hba->vops->set_dma_mask(hba);
>         if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
>                 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
>                         return 0;
> diff --git a/drivers/ufs/host/ufs-renesas.c b/drivers/ufs/host/ufs-renesas.c
> index 8711e5cbc968..8b0aebf127b6 100644
> --- a/drivers/ufs/host/ufs-renesas.c
> +++ b/drivers/ufs/host/ufs-renesas.c
> @@ -7,6 +7,7 @@
> 
>  #include <linux/clk.h>
>  #include <linux/delay.h>
> +#include <linux/dma-mapping.h>
>  #include <linux/err.h>
>  #include <linux/iopoll.h>
>  #include <linux/kernel.h>
> @@ -364,14 +365,18 @@ static int ufs_renesas_init(struct ufs_hba *hba)
>                 return -ENOMEM;
>         ufshcd_set_variant(hba, priv);
> 
> -       hba->quirks |= UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS |
> UFSHCD_QUIRK_HIBERN_FASTAUTO;
> -
Was it intentional to remove the UFSHCD_QUIRK_HIBERN_FASTAUTO as well?

Thanks,
Avri

>         return 0;
>  }
> 
> +static int ufs_renesas_set_dma_mask(struct ufs_hba *hba) {
> +       return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32)); }
> +
>  static const struct ufs_hba_variant_ops ufs_renesas_vops = {
>         .name           = "renesas",
>         .init           = ufs_renesas_init,
> +       .set_dma_mask   = ufs_renesas_set_dma_mask,
>         .setup_clocks   = ufs_renesas_setup_clocks,
>         .hce_enable_notify = ufs_renesas_hce_enable_notify,
>         .dbg_register_dump = ufs_renesas_dbg_register_dump, diff --git
> a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h index
> 36bd91ff3593..9ea2a7411bb5 100644
> --- a/include/ufs/ufshcd.h
> +++ b/include/ufs/ufshcd.h
> @@ -299,6 +299,8 @@ struct ufs_pwr_mode_info {
>   * @max_num_rtt: maximum RTT supported by the host
>   * @init: called when the driver is initialized
>   * @exit: called to cleanup everything done in init
> + * @set_dma_mask: For setting another DMA mask than indicated by the
> 64AS
> + *     capability bit.
>   * @get_ufs_hci_version: called to get UFS HCI version
>   * @clk_scale_notify: notifies that clks are scaled up/down
>   * @setup_clocks: called before touching any of the controller registers @@
> -341,6 +343,7 @@ struct ufs_hba_variant_ops {
>         int     (*init)(struct ufs_hba *);
>         void    (*exit)(struct ufs_hba *);
>         u32     (*get_ufs_hci_version)(struct ufs_hba *);
> +       int     (*set_dma_mask)(struct ufs_hba *);
>         int     (*clk_scale_notify)(struct ufs_hba *, bool,
>                                     enum ufs_notify_change_status);
>         int     (*setup_clocks)(struct ufs_hba *, bool,
> @@ -623,12 +626,6 @@ enum ufshcd_quirks {
>          */
>         UFSHCD_QUIRK_SKIP_PH_CONFIGURATION              = 1 << 16,
> 
> -       /*
> -        * This quirk needs to be enabled if the host controller has
> -        * 64-bit addressing supported capability but it doesn't work.
> -        */
> -       UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS               = 1 << 17,
> -
>         /*
>          * This quirk needs to be enabled if the host controller has
>          * auto-hibernate capability but it's FASTAUTO only.
diff mbox series

Patch

diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c
index 75e00e5b3f79..c1d4a9c8480f 100644
--- a/drivers/ufs/core/ufshcd.c
+++ b/drivers/ufs/core/ufshcd.c
@@ -2389,8 +2389,6 @@  static inline int ufshcd_hba_capabilities(struct ufs_hba *hba)
 	int err;
 
 	hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
-	if (hba->quirks & UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS)
-		hba->capabilities &= ~MASK_64_ADDRESSING_SUPPORT;
 
 	/* nutrs and nutmrs are 0 based values */
 	hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS_SDB) + 1;
@@ -10280,6 +10278,8 @@  EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
  */
 static int ufshcd_set_dma_mask(struct ufs_hba *hba)
 {
+	if (hba->vops && hba->vops->set_dma_mask)
+		return hba->vops->set_dma_mask(hba);
 	if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
 		if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
 			return 0;
diff --git a/drivers/ufs/host/ufs-renesas.c b/drivers/ufs/host/ufs-renesas.c
index 8711e5cbc968..8b0aebf127b6 100644
--- a/drivers/ufs/host/ufs-renesas.c
+++ b/drivers/ufs/host/ufs-renesas.c
@@ -7,6 +7,7 @@ 
 
 #include <linux/clk.h>
 #include <linux/delay.h>
+#include <linux/dma-mapping.h>
 #include <linux/err.h>
 #include <linux/iopoll.h>
 #include <linux/kernel.h>
@@ -364,14 +365,18 @@  static int ufs_renesas_init(struct ufs_hba *hba)
 		return -ENOMEM;
 	ufshcd_set_variant(hba, priv);
 
-	hba->quirks |= UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS | UFSHCD_QUIRK_HIBERN_FASTAUTO;
-
 	return 0;
 }
 
+static int ufs_renesas_set_dma_mask(struct ufs_hba *hba)
+{
+	return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
+}
+
 static const struct ufs_hba_variant_ops ufs_renesas_vops = {
 	.name		= "renesas",
 	.init		= ufs_renesas_init,
+	.set_dma_mask	= ufs_renesas_set_dma_mask,
 	.setup_clocks	= ufs_renesas_setup_clocks,
 	.hce_enable_notify = ufs_renesas_hce_enable_notify,
 	.dbg_register_dump = ufs_renesas_dbg_register_dump,
diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
index 36bd91ff3593..9ea2a7411bb5 100644
--- a/include/ufs/ufshcd.h
+++ b/include/ufs/ufshcd.h
@@ -299,6 +299,8 @@  struct ufs_pwr_mode_info {
  * @max_num_rtt: maximum RTT supported by the host
  * @init: called when the driver is initialized
  * @exit: called to cleanup everything done in init
+ * @set_dma_mask: For setting another DMA mask than indicated by the 64AS
+ *	capability bit.
  * @get_ufs_hci_version: called to get UFS HCI version
  * @clk_scale_notify: notifies that clks are scaled up/down
  * @setup_clocks: called before touching any of the controller registers
@@ -341,6 +343,7 @@  struct ufs_hba_variant_ops {
 	int	(*init)(struct ufs_hba *);
 	void    (*exit)(struct ufs_hba *);
 	u32	(*get_ufs_hci_version)(struct ufs_hba *);
+	int	(*set_dma_mask)(struct ufs_hba *);
 	int	(*clk_scale_notify)(struct ufs_hba *, bool,
 				    enum ufs_notify_change_status);
 	int	(*setup_clocks)(struct ufs_hba *, bool,
@@ -623,12 +626,6 @@  enum ufshcd_quirks {
 	 */
 	UFSHCD_QUIRK_SKIP_PH_CONFIGURATION		= 1 << 16,
 
-	/*
-	 * This quirk needs to be enabled if the host controller has
-	 * 64-bit addressing supported capability but it doesn't work.
-	 */
-	UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS		= 1 << 17,
-
 	/*
 	 * This quirk needs to be enabled if the host controller has
 	 * auto-hibernate capability but it's FASTAUTO only.