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Bottomley" , Matthias Brugger , open list , "moderated list:ARM/Mediatek SoC support" , "moderated list:ARM/Mediatek SoC support" Subject: [PATCH v1 02/16] ufs: core: Introduce Multi-circular queue capability Date: Thu, 22 Sep 2022 18:05:09 -0700 Message-ID: X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: M4bs7s3cq_iaalSHfH1fSnJut6lSrTMm X-Proofpoint-ORIG-GUID: M4bs7s3cq_iaalSHfH1fSnJut6lSrTMm X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-22_16,2022-09-22_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 impostorscore=0 suspectscore=0 phishscore=0 spamscore=0 mlxlogscore=999 clxscore=1015 lowpriorityscore=0 adultscore=0 malwarescore=0 mlxscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2209230005 Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Adds support to check for MCQ capability in the UFSHC. This capability can be used by host drivers to control MCQ enablement. Co-developed-by: Can Guo Signed-off-by: Can Guo Signed-off-by: Asutosh Das --- drivers/ufs/core/ufshcd.c | 5 +++++ include/ufs/ufshcd.h | 13 +++++++++++++ 2 files changed, 18 insertions(+) diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index 4b9ae83..24661fc 100644 --- a/drivers/ufs/core/ufshcd.c +++ b/drivers/ufs/core/ufshcd.c @@ -89,6 +89,7 @@ #define FDEVICEINIT_COMPL_TIMEOUT 1500 /* millisecs */ #define EXT_IID_CAP_SHIFT 10 +#define MCQ_SUPP_SHIFT 30 #define ufshcd_toggle_vreg(_dev, _vreg, _on) \ ({ \ int _ret; \ @@ -2240,6 +2241,10 @@ static inline int ufshcd_hba_capabilities(struct ufs_hba *hba) if (err) dev_err(hba->dev, "crypto setup failed\n"); + hba->mcq_sup = (hba->capabilities & MASK_MCQ_SUPPORT) >> MCQ_SUPP_SHIFT; + if (!hba->mcq_sup) + return err; + hba->mcq_capabilities = ufshcd_readl(hba, REG_MCQCAP); hba->ext_iid_sup = (hba->mcq_capabilities & MASK_EXT_IID_SUPPORT) >> EXT_IID_CAP_SHIFT; diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h index da1eb8a..da7ec0c 100644 --- a/include/ufs/ufshcd.h +++ b/include/ufs/ufshcd.h @@ -660,6 +660,12 @@ enum ufshcd_caps { * notification if it is supported by the UFS device. */ UFSHCD_CAP_TEMP_NOTIF = 1 << 11, + + /* + * This capability allows the host controller driver to turn on/off + * MCQ mode. MCQ mode may be used to increase performance. + */ + UFSHCD_CAP_MCQ_EN = 1 << 12, }; struct ufs_hba_variant_params { @@ -820,6 +826,7 @@ struct ufs_hba_monitor { * @complete_put: whether or not to call ufshcd_rpm_put() from inside * ufshcd_resume_complete() * @ext_iid_sup: is EXT_IID is supported by UFSHC + * @mcq_sup: is mcq supported by UFSHC */ struct ufs_hba { void __iomem *mmio_base; @@ -969,8 +976,14 @@ struct ufs_hba { u32 luns_avail; bool complete_put; bool ext_iid_sup; + bool mcq_sup; }; +static inline bool is_mcq_supported(struct ufs_hba *hba) +{ + return hba->mcq_sup && (hba->caps & UFSHCD_CAP_MCQ_EN); +} + /* Returns true if clocks can be gated. Otherwise false */ static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba) {