diff mbox

[1/2] sh: Fix unaligned memory access for branches without delay slots

Message ID 1314028568-7571-1-git-send-email-phil.edworthy@renesas.com (mailing list archive)
State Accepted
Commit 0710b91c516ffd448db6e80e9026f11778a80d45
Headers show

Commit Message

Phil Edworthy Aug. 22, 2011, 3:56 p.m. UTC
This patch just clears the return code for those cases where an
unaligned memory access occurs on branch instructions without a
delay slot.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
---
 arch/sh/kernel/traps_32.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

Comments

Paul Mundt Aug. 29, 2011, 7:24 a.m. UTC | #1
On Mon, Aug 22, 2011 at 04:56:08PM +0100, Phil Edworthy wrote:
> This patch just clears the return code for those cases where an
> unaligned memory access occurs on branch instructions without a
> delay slot.
> 
> Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>

On Wed, Aug 24, 2011 at 11:43:59AM +0100, Phil Edworthy wrote:
> This adds unaligned memory access support for the following instructions:
>   mov.w @(disp,PC),Rn
>   mov.l @(disp,PC),Rn
> 
> These instructions are often used on SH2A toolchains.
> 
> Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
> ---
> v3:
>   Fixed the PC relative address calculation
> v2:
>   Fixed the mov.l case for big endian
>   Fixed typo in commit msg
> 
>  arch/sh/kernel/traps_32.c |   35 +++++++++++++++++++++++++++++++++++
>  1 files changed, 35 insertions(+), 0 deletions(-)
> 
Both applied, thanks.
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diff mbox

Patch

diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c
index d9006f8..61fa4a5 100644
--- a/arch/sh/kernel/traps_32.c
+++ b/arch/sh/kernel/traps_32.c
@@ -466,6 +466,7 @@  int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
 		case 0x0500: /* mov.w @(disp,Rm),R0 */
 			goto simple;
 		case 0x0B00: /* bf   lab - no delayslot*/
+			ret = 0;
 			break;
 		case 0x0F00: /* bf/s lab */
 			ret = handle_delayslot(regs, instruction, ma);
@@ -479,6 +480,7 @@  int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
 			}
 			break;
 		case 0x0900: /* bt   lab - no delayslot */
+			ret = 0;
 			break;
 		case 0x0D00: /* bt/s lab */
 			ret = handle_delayslot(regs, instruction, ma);