From patchwork Sat Dec 15 22:50:36 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 1883401 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 0AE07DF2EF for ; Sat, 15 Dec 2012 22:50:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751700Ab2LOWut (ORCPT ); Sat, 15 Dec 2012 17:50:49 -0500 Received: from perceval.ideasonboard.com ([95.142.166.194]:40072 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751735Ab2LOWus (ORCPT ); Sat, 15 Dec 2012 17:50:48 -0500 Received: from avalon.quadriga.com (unknown [194.136.87.226]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 938EF35A83; Sat, 15 Dec 2012 23:50:46 +0100 (CET) From: Laurent Pinchart To: linux-sh@vger.kernel.org Cc: Paul Mundt , Magnus Damm , Simon Horman , Linus Walleij , Kuninori Morimoto , Phil Edworthy , Nobuhiro Iwamatsu Subject: [PATCH v3 02/81] sh: sh7269: Rename CRX0CRX1(CRX2) marks to match GPIO names Date: Sat, 15 Dec 2012 23:50:36 +0100 Message-Id: <1355611915-25060-3-git-send-email-laurent.pinchart+renesas@ideasonboard.com> X-Mailer: git-send-email 1.7.8.6 In-Reply-To: <1355611915-25060-1-git-send-email-laurent.pinchart+renesas@ideasonboard.com> References: <1355611915-25060-1-git-send-email-laurent.pinchart+renesas@ideasonboard.com> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org Rename CRX0CRX1_MARK and CRX0CRX1CRX2_MARK to CRX0_CRX1_MARK and CRX0_CRX1_CRX2_MARK respectively to match the GPIO_FN_CRX0_CRX1 and GPIO_FN_CRX0_CRX1_CRX2 GPIO names. Signed-off-by: Laurent Pinchart --- arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c | 12 ++++++------ 1 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c b/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c index 039e458..1289fd9 100644 --- a/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c +++ b/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c @@ -739,8 +739,8 @@ enum { CRX0_MARK, CTX0_MARK, CRX1_MARK, CTX1_MARK, CRX2_MARK, CTX2_MARK, - CRX0CRX1_MARK, - CRX0CRX1CRX2_MARK, + CRX0_CRX1_MARK, + CRX0_CRX1_CRX2_MARK, CTX0CTX1CTX2_MARK, CRX1_PJ22_MARK, CTX1_PJ23_MARK, CRX2_PJ20_MARK, CTX2_PJ21_MARK, @@ -829,7 +829,7 @@ static pinmux_enum_t pinmux_data[] = { PINMUX_DATA(CKE_MARK, PC7MD_001), PINMUX_DATA(RXD7_MARK, PC7MD_010), PINMUX_DATA(CRX1_MARK, PC7MD_011), - PINMUX_DATA(CRX0CRX1_MARK, PC7MD_100), + PINMUX_DATA(CRX0_CRX1_MARK, PC7MD_100), PINMUX_DATA(IRQ1_PC_MARK, PC7MD_101), PINMUX_DATA(PC6_DATA, PC6MD_000), @@ -1300,7 +1300,7 @@ static pinmux_enum_t pinmux_data[] = { PINMUX_DATA(LCD_TCON5_MARK, PJ22MD_011), PINMUX_DATA(IRQ2_PJ_MARK, PJ22MD_100), PINMUX_DATA(CRX1_MARK, PJ22MD_101), - PINMUX_DATA(CRX0CRX1_MARK, PJ22MD_110), + PINMUX_DATA(CRX0_CRX1_MARK, PJ22MD_110), PINMUX_DATA(PJ21_DATA, PJ21MD_000), PINMUX_DATA(DV_DATA21_MARK, PJ21MD_001), @@ -1666,8 +1666,8 @@ static struct pinmux_gpio pinmux_gpios[] = { PINMUX_GPIO(GPIO_FN_CRX1, CRX1_MARK), PINMUX_GPIO(GPIO_FN_CTX0, CTX0_MARK), PINMUX_GPIO(GPIO_FN_CRX0, CRX0_MARK), - PINMUX_GPIO(GPIO_FN_CRX0_CRX1, CRX0CRX1_MARK), - PINMUX_GPIO(GPIO_FN_CRX0_CRX1_CRX2, CRX0CRX1CRX2_MARK), + PINMUX_GPIO(GPIO_FN_CRX0_CRX1, CRX0_CRX1_MARK), + PINMUX_GPIO(GPIO_FN_CRX0_CRX1_CRX2, CRX0_CRX1_CRX2_MARK), /* DMAC */ PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK),