From patchwork Wed Jan 9 19:41:52 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bastian Hecht X-Patchwork-Id: 1954191 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 079B7DF2EB for ; Wed, 9 Jan 2013 19:41:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932106Ab3AITlx (ORCPT ); Wed, 9 Jan 2013 14:41:53 -0500 Received: from mail-bk0-f46.google.com ([209.85.214.46]:61488 "EHLO mail-bk0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932301Ab3AITlx (ORCPT ); Wed, 9 Jan 2013 14:41:53 -0500 Received: by mail-bk0-f46.google.com with SMTP id q16so1165338bkw.33 for ; Wed, 09 Jan 2013 11:41:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=gXbEj6TDPQDL8yy1hmX0wJ6dZA57HFEvQeHq7ExDIRk=; b=ZRMVasHmR7bMqSmwx10nW1W/yrQRp00pCIKQFVj44RxoD3P5Nlh/qEHRrlpLuwVOlG y5D5ZMkcTTUNJgSOuaCMGOHRNlNKsvqqoPvCPqBCTJO8LQ0H+axy3yHyZH8Qi1ePBUCD Co5lCrgxeTLtejowrU23jKCf/wmGcl16azufjgtUd56Vb+7yp7CKW6UYDhEEmgON+LPH 3YFxND67fd//nWbeHjLmYs6Ct8gLS2GqFeoEsLwMtJl2tMsn2iDBOKDRyj2DVfKQjMh6 s1Dzc0vBq07ugPaVnpbWq1TMaqpciwda2C7VbX4+CVg6kSr2aD4hoKTlJrXO/+dytL1O sZNw== X-Received: by 10.204.150.137 with SMTP id y9mr33700157bkv.103.1357760511924; Wed, 09 Jan 2013 11:41:51 -0800 (PST) Received: from localhost.localdomain (dslb-088-073-001-155.pools.arcor-ip.net. [88.73.1.155]) by mx.google.com with ESMTPS id o7sm49874591bkv.13.2013.01.09.11.41.51 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 09 Jan 2013 11:41:51 -0800 (PST) From: Bastian Hecht To: linux-sh@vger.kernel.org Cc: Magnus Damm , Simon Horman , Rob Herring , linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 2/2] ARM: SH-Mobile: sh73a0: Add CPU Hotplug Date: Wed, 9 Jan 2013 20:41:52 +0100 Message-Id: <1357760512-2634-2-git-send-email-hechtb+renesas@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1357760512-2634-1-git-send-email-hechtb+renesas@gmail.com> References: <1357760512-2634-1-git-send-email-hechtb+renesas@gmail.com> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org Add the capability to add and remove CPUs on the fly. The Cortex-A9 offers the possibility to take single cores out of the MP Core. We add this capabilty taking care that caches are kept coherent. For verifying the shutdown we rely on the internal SH73A0 Power Status Register PSTR. Signed-off-by: Bastian Hecht --- v2: don't use custom function sh73a0_do_wfi() but trust in cpu_do_idle() arch/arm/mach-shmobile/smp-sh73a0.c | 36 +++++++++++++++++++++++++++++------ 1 file changed, 30 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c index 5e36f5d..88aee9d 100644 --- a/arch/arm/mach-shmobile/smp-sh73a0.c +++ b/arch/arm/mach-shmobile/smp-sh73a0.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -36,6 +37,8 @@ #define SBAR IOMEM(0xe6180020) #define APARMBAREA IOMEM(0xe6f10020) +#define PSTR_SHUTDOWN_MODE 3 + static void __iomem *scu_base_addr(void) { return (void __iomem *)0xf0000000; @@ -92,16 +95,20 @@ static void __init sh73a0_smp_init_cpus(void) shmobile_smp_init_cpus(ncores); } -static int __maybe_unused sh73a0_cpu_kill(unsigned int cpu) +#ifdef CONFIG_HOTPLUG_CPU +static int sh73a0_cpu_kill(unsigned int cpu) { + int k; + u32 pstr; - /* this function is running on another CPU than the offline target, - * here we need wait for shutdown code in platform_cpu_die() to - * finish before asking SoC-specific code to power off the CPU core. + /* + * wait until the power status register confirms the shutdown of the + * offline target */ for (k = 0; k < 1000; k++) { - if (shmobile_cpu_is_dead(cpu)) + pstr = (__raw_readl(PSTR) >> (4 * cpu)) & 3; + if (pstr == PSTR_SHUTDOWN_MODE) return 1; mdelay(1); @@ -110,6 +117,23 @@ static int __maybe_unused sh73a0_cpu_kill(unsigned int cpu) return 0; } +static void sh73a0_cpu_die(unsigned int cpu) +{ + /* + * The ARM MPcore does not issue a cache coherency request for the L1 + * cache when powering off single CPUs. We must take care of this and + * further caches. + */ + dsb(); + flush_cache_all(); + + /* Set power off mode. This takes the CPU out of the MP cluster */ + scu_power_mode(scu_base_addr(), SCU_PM_POWEROFF); + + /* Enter shutdown mode */ + cpu_do_idle(); +} +#endif /* CONFIG_HOTPLUG_CPU */ struct smp_operations sh73a0_smp_ops __initdata = { .smp_init_cpus = sh73a0_smp_init_cpus, @@ -118,7 +142,7 @@ struct smp_operations sh73a0_smp_ops __initdata = { .smp_boot_secondary = sh73a0_boot_secondary, #ifdef CONFIG_HOTPLUG_CPU .cpu_kill = sh73a0_cpu_kill, - .cpu_die = shmobile_cpu_die, + .cpu_die = sh73a0_cpu_die, .cpu_disable = shmobile_cpu_disable, #endif };