From patchwork Mon Mar 18 11:04:58 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 2287061 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 7637D3FCF6 for ; Mon, 18 Mar 2013 11:08:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752148Ab3CRLIP (ORCPT ); Mon, 18 Mar 2013 07:08:15 -0400 Received: from kirsty.vergenet.net ([202.4.237.240]:54912 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751431Ab3CRLHZ (ORCPT ); Mon, 18 Mar 2013 07:07:25 -0400 Received: from ayumi.akashicho.tokyo.vergenet.net (p8120-ipbfp1001kobeminato.hyogo.ocn.ne.jp [118.10.137.120]) by kirsty.vergenet.net (Postfix) with ESMTP id 98DB4266CED; Mon, 18 Mar 2013 22:07:23 +1100 (EST) Received: by ayumi.akashicho.tokyo.vergenet.net (Postfix, from userid 7100) id 2BE29EDE145; Mon, 18 Mar 2013 20:07:22 +0900 (JST) From: Simon Horman To: Arnd Bergmann , Olof Johansson Cc: linux-sh@vger.kernel.org, arm@kernel.org, linux-arm-kernel@lists.infradead.org, Magnus Damm , Laurent Pinchart , Linus Walleij Subject: [PATCH 002/142] sh-pfc: Don't define the per-device pinctrl struct instances as global Date: Mon, 18 Mar 2013 20:04:58 +0900 Message-Id: <1363604838-29359-3-git-send-email-horms+renesas@verge.net.au> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1363604838-29359-1-git-send-email-horms+renesas@verge.net.au> References: <1363604838-29359-1-git-send-email-horms+renesas@verge.net.au> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org From: Laurent Pinchart The pinctrl_desc and pinctrl_gpio_range structures registered with the pinctrl core are per-device instances. Move them to the dynamically allocated sh_pfc_pinctrl structure and initialize them at runtime. Signed-off-by: Laurent Pinchart Acked-by: Linus Walleij --- drivers/pinctrl/sh-pfc/pinctrl.c | 40 +++++++++++++++++--------------------- 1 file changed, 18 insertions(+), 22 deletions(-) diff --git a/drivers/pinctrl/sh-pfc/pinctrl.c b/drivers/pinctrl/sh-pfc/pinctrl.c index 887930e..d113746 100644 --- a/drivers/pinctrl/sh-pfc/pinctrl.c +++ b/drivers/pinctrl/sh-pfc/pinctrl.c @@ -27,6 +27,9 @@ struct sh_pfc_pinctrl { struct pinctrl_dev *pctl; + struct pinctrl_desc pctl_desc; + struct pinctrl_gpio_range range; + struct sh_pfc *pfc; struct pinmux_gpio **functions; @@ -314,19 +317,6 @@ static const struct pinconf_ops sh_pfc_pinconf_ops = { .pin_config_dbg_show = sh_pfc_pinconf_dbg_show, }; -static struct pinctrl_gpio_range sh_pfc_gpio_range = { - .name = DRV_NAME, - .id = 0, -}; - -static struct pinctrl_desc sh_pfc_pinctrl_desc = { - .name = DRV_NAME, - .owner = THIS_MODULE, - .pctlops = &sh_pfc_pinctrl_ops, - .pmxops = &sh_pfc_pinmux_ops, - .confops = &sh_pfc_pinconf_ops, -}; - static void sh_pfc_map_one_gpio(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx, struct pinmux_gpio *gpio, unsigned offset) { @@ -386,9 +376,6 @@ static int sh_pfc_map_gpios(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx) spin_unlock_irqrestore(&pfc->lock, flags); - sh_pfc_pinctrl_desc.pins = pmx->pads; - sh_pfc_pinctrl_desc.npins = pmx->nr_pads; - return 0; } @@ -438,16 +425,25 @@ int sh_pfc_register_pinctrl(struct sh_pfc *pfc) if (unlikely(ret != 0)) return ret; - pmx->pctl = pinctrl_register(&sh_pfc_pinctrl_desc, pfc->dev, pmx); + pmx->pctl_desc.name = DRV_NAME; + pmx->pctl_desc.owner = THIS_MODULE; + pmx->pctl_desc.pctlops = &sh_pfc_pinctrl_ops; + pmx->pctl_desc.pmxops = &sh_pfc_pinmux_ops; + pmx->pctl_desc.confops = &sh_pfc_pinconf_ops; + pmx->pctl_desc.pins = pmx->pads; + pmx->pctl_desc.npins = pmx->nr_pads; + + pmx->pctl = pinctrl_register(&pmx->pctl_desc, pfc->dev, pmx); if (IS_ERR(pmx->pctl)) return PTR_ERR(pmx->pctl); - sh_pfc_gpio_range.npins = pfc->info->last_gpio - - pfc->info->first_gpio + 1; - sh_pfc_gpio_range.base = pfc->info->first_gpio; - sh_pfc_gpio_range.pin_base = pfc->info->first_gpio; + pmx->range.name = DRV_NAME, + pmx->range.id = 0; + pmx->range.npins = pfc->info->last_gpio - pfc->info->first_gpio + 1; + pmx->range.base = pfc->info->first_gpio; + pmx->range.pin_base = pfc->info->first_gpio; - pinctrl_add_gpio_range(pmx->pctl, &sh_pfc_gpio_range); + pinctrl_add_gpio_range(pmx->pctl, &pmx->range); return 0; }