From patchwork Thu Apr 4 13:45:43 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bastian Hecht X-Patchwork-Id: 2392971 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id AEF613FD1A for ; Thu, 4 Apr 2013 13:45:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760603Ab3DDNpw (ORCPT ); Thu, 4 Apr 2013 09:45:52 -0400 Received: from mail-bk0-f54.google.com ([209.85.214.54]:37027 "EHLO mail-bk0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1760451Ab3DDNpv (ORCPT ); Thu, 4 Apr 2013 09:45:51 -0400 Received: by mail-bk0-f54.google.com with SMTP id q16so1530764bkw.13 for ; Thu, 04 Apr 2013 06:45:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=sZ31+tH8s/8mWL7uVKk3hp2iXeXQeK1CIFwsVnx2/vI=; b=WBOM4e0VQdoKhie0cN4weQZl+IPUWa33STR8Sv3INYFyUinl9r4dByEc/98T8h5Nqb XtEhGoGw4mX5/qa0w6w1seZjkNuxRpVbhwyqR6gikh7I0ZEiJFik/mH65LIoq2F7ks1T iJGfei3Ls4hsJhQ4mfnYPTET31SPrMTWiXecMYG31CN6f5MR6Hq+EdDWbRytJBkHDurT ph9XFPmHeYb2fpn2I5Mbl2GcQQ3aEd2ySmo0YBbv+KXtBH8pl4V+E6LXicvTb2KLwF9w afyB0THN9EHsIA+WauvMUBxdCzBUfRTVNPJtKEQYbl5AIghoctq7I9cFRSB4Fy4L+NRS fKjQ== X-Received: by 10.204.224.75 with SMTP id in11mr4422237bkb.97.1365083150606; Thu, 04 Apr 2013 06:45:50 -0700 (PDT) Received: from localhost.localdomain (p4FD22916.dip.t-dialin.net. [79.210.41.22]) by mx.google.com with ESMTPS id jt9sm6074144bkb.18.2013.04.04.06.45.49 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 04 Apr 2013 06:45:50 -0700 (PDT) From: Bastian Hecht To: linux-sh@vger.kernel.org Cc: Magnus Damm , Simon Horman , Laurent Pichart , Bastian Hecht Subject: [PATCH 5/6] ARM: shmobile: r8a7740: Add OF support to initialze the GIC Date: Thu, 4 Apr 2013 15:45:43 +0200 Message-Id: <1365083144-16085-5-git-send-email-hechtb+renesas@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1365083144-16085-1-git-send-email-hechtb+renesas@gmail.com> References: <1365083144-16085-1-git-send-email-hechtb+renesas@gmail.com> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org We add a variant to initalize the interrupt controller in case we describe the GIC using the Device Tree and not platform data. Signed-off-by: Bastian Hecht --- arch/arm/mach-shmobile/include/mach/r8a7740.h | 1 + arch/arm/mach-shmobile/intc-r8a7740.c | 24 ++++++++++++++++++------ 2 files changed, 19 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h index 61df082..1cf6869 100644 --- a/arch/arm/mach-shmobile/include/mach/r8a7740.h +++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h @@ -535,6 +535,7 @@ enum { extern void r8a7740_meram_workaround(void); extern void r8a7740_init_delay(void); extern void r8a7740_init_irq(void); +extern void r8a7740_init_irq_of(void); extern void r8a7740_map_io(void); extern void r8a7740_add_early_devices(void); extern void r8a7740_add_standard_devices(void); diff --git a/arch/arm/mach-shmobile/intc-r8a7740.c b/arch/arm/mach-shmobile/intc-r8a7740.c index b741c84..58115e8 100644 --- a/arch/arm/mach-shmobile/intc-r8a7740.c +++ b/arch/arm/mach-shmobile/intc-r8a7740.c @@ -20,19 +20,15 @@ #include #include +#include #include -void __init r8a7740_init_irq(void) +void __init r8a7740_init_irq_common(void) { - void __iomem *gic_dist_base = ioremap_nocache(0xc2800000, 0x1000); - void __iomem *gic_cpu_base = ioremap_nocache(0xc2000000, 0x1000); void __iomem *intc_prio_base = ioremap_nocache(0xe6900010, 0x10); void __iomem *intc_msk_base = ioremap_nocache(0xe6900040, 0x10); void __iomem *pfc_inta_ctrl = ioremap_nocache(0xe605807c, 0x4); - /* initialize the Generic Interrupt Controller PL390 r0p0 */ - gic_init(0, 29, gic_dist_base, gic_cpu_base); - /* route signals to GIC */ iowrite32(0x0, pfc_inta_ctrl); @@ -54,3 +50,19 @@ void __init r8a7740_init_irq(void) iounmap(intc_msk_base); iounmap(pfc_inta_ctrl); } + +void __init r8a7740_init_irq_of(void) +{ + irqchip_init(); + r8a7740_init_irq_common(); +} + +void __init r8a7740_init_irq(void) +{ + void __iomem *gic_dist_base = ioremap_nocache(0xc2800000, 0x1000); + void __iomem *gic_cpu_base = ioremap_nocache(0xc2000000, 0x1000); + + /* initialize the Generic Interrupt Controller PL390 r0p0 */ + gic_init(0, 29, gic_dist_base, gic_cpu_base); + r8a7740_init_irq_common(); +}