From patchwork Thu Apr 11 11:23:57 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bastian Hecht X-Patchwork-Id: 2427301 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 61DF23FD40 for ; Thu, 11 Apr 2013 11:24:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752742Ab3DKLYM (ORCPT ); Thu, 11 Apr 2013 07:24:12 -0400 Received: from mail-bk0-f50.google.com ([209.85.214.50]:51447 "EHLO mail-bk0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752436Ab3DKLYM (ORCPT ); Thu, 11 Apr 2013 07:24:12 -0400 Received: by mail-bk0-f50.google.com with SMTP id jg1so759773bkc.37 for ; Thu, 11 Apr 2013 04:24:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer; bh=e8s/aDJaQpoM2SJLa0QE2LRLOWIrlHJwoYpT4GTQkOg=; b=Nf4Z//NYveET999PzIu9YK4z4oxIRWCAWom7rcIcbdxaQ/XQKseOFGnKrdmcl3u60q dzldoMyUoxIXcjLbebWsUdnKWxlVyAqWPoBIGC8ypWer+TojJAVBgxd8bEoVK+75cx22 RIq4lU2/I3y6YqdbZEaJyvW/jfx5vk4gK1xUH+vBzo6K5X0s2o2jbLzxZsIXiAnXom8P MNtwSCCZoKBv7y0fHZsnz2g7PSvTqjgdOtkwtpNbkP56Nl/5bXq+7r7iOYML3XLjTIFp yDEDqTxkjzkkOnTYfMpkQzfUsRgVpn+vyToiKRyVWELFruqnOYpv0YxYXkPJKOdCXnK6 l1eQ== X-Received: by 10.205.35.13 with SMTP id su13mr2329692bkb.40.1365679448833; Thu, 11 Apr 2013 04:24:08 -0700 (PDT) Received: from localhost.localdomain (g229146212.adsl.alicedsl.de. [92.229.146.212]) by mx.google.com with ESMTPS id uo3sm1665914bkb.11.2013.04.11.04.24.06 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 11 Apr 2013 04:24:07 -0700 (PDT) From: Bastian Hecht To: linux-sh@vger.kernel.org Cc: Magnus Damm , Simon Horman , Paul Mundt , Mark Rutland , Sergei Shtylyov , linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 1/7] ARM: shmobile: Define DT bindings for timer devices Date: Thu, 11 Apr 2013 13:23:57 +0200 Message-Id: <1365679443-25456-1-git-send-email-hechtb+renesas@gmail.com> X-Mailer: git-send-email 1.7.9.5 Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org The SH mobile series currently features 3 timer devices in the kernel: Compare Match Timer (CMT), Timer Unit (TMU) and MTU2. These devices share register layout characteristics amongst each that enable us to define common DT bindings for them. Signed-off-by: Bastian Hecht --- v4: same. only patch 2 and 3 changed .../devicetree/bindings/timer/renesas,timer.txt | 45 ++++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/renesas,timer.txt diff --git a/Documentation/devicetree/bindings/timer/renesas,timer.txt b/Documentation/devicetree/bindings/timer/renesas,timer.txt new file mode 100644 index 0000000..2c001bf --- /dev/null +++ b/Documentation/devicetree/bindings/timer/renesas,timer.txt @@ -0,0 +1,45 @@ +* Renesas SH Mobile Timer + +Bindings for several timer devices from Renesas including CMT, TMU and MTU2. + +Required properties: +- compatible : Should be "renesas,{device}-timer", + whereas device is "cmt", "tmu" or "mtu2". +- reg : Address and length of the register set for the device +- interrupts : Timer interrupt +- renesas,device-id : The ID of the timer device +- renesas,channel-id : The channel ID of the timer device +- renesas,source-quality : The viability to use this device as a free + running clock. From 0 (do not use) to 10 (best possible clock). +- renesas,event-quality : The viability to use this device as an event + generator. From 0 (do not use) to 10 (best possible clock). + +The properties renesas,{source,event}-quality reflect the situation that the +usability of the timer devices depend on the location within their SoCs. E.g. +the power domain affinty affects power management, some mux-ed lines might be +preferred to be assigned to other functions and other constraints. + +Example for CMT1 channel 0 on the R8A7740 SoC: + + timer@e6138010 { + compatible = "renesas,cmt-timer"; + interrupt-parent = <&intca>; + reg = <0xe6138010 0xc>; + interrupts = <0x0b00>; + renesas,device-id = <1>; + renesas,channel-id = <0>; + renesas,source-quality = <3>; + renesas,event-quality = <3>; + }; + +Example for TMU0 channel 1 on the SH7372 SoC: + timer@fff60014 { + compatible = "renesas,tmu-timer"; + interrupt-parent = <&intcs>; + reg = <0xfff60014 0xc>; + interrupts = <0xea0>; + renesas,device-id = <0>; + renesas,channel-id = <1>; + renesas,source-quality = <4>; + renesas,event-quality = <0>; + };