From patchwork Fri Jun 7 08:22:08 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 2685031 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 0567CDFB78 for ; Fri, 7 Jun 2013 08:22:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753296Ab3FGIWd (ORCPT ); Fri, 7 Jun 2013 04:22:33 -0400 Received: from kirsty.vergenet.net ([202.4.237.240]:58654 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753255Ab3FGIWW (ORCPT ); Fri, 7 Jun 2013 04:22:22 -0400 Received: from ayumi.isobedori.kobe.vergenet.net (p5212-ipbfp1903kobeminato.hyogo.ocn.ne.jp [114.172.132.212]) by kirsty.vergenet.net (Postfix) with ESMTP id 57F3A266CED; Fri, 7 Jun 2013 18:22:17 +1000 (EST) Received: by ayumi.isobedori.kobe.vergenet.net (Postfix, from userid 7100) id 41371EDE7DD; Fri, 7 Jun 2013 17:22:15 +0900 (JST) From: Simon Horman To: Arnd Bergmann , Olof Johansson Cc: linux-sh@vger.kernel.org, arm@kernel.org, linux-arm-kernel@lists.infradead.org, Magnus Damm , Kuninori Morimoto , Simon Horman Subject: [PATCH 10/11] ARM: shmobile: bockw: add SDHI0 support Date: Fri, 7 Jun 2013 17:22:08 +0900 Message-Id: <1370593329-27559-11-git-send-email-horms+renesas@verge.net.au> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1370593329-27559-1-git-send-email-horms+renesas@verge.net.au> References: <1370593329-27559-1-git-send-email-horms+renesas@verge.net.au> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org From: Kuninori Morimoto This patch is directly accessing to PUPR4 register which can control SDHI0 CD/WP pin pull-up setting. It should be replaced in the future. Signed-off-by: Kuninori Morimoto Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/board-bockw.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c index 4d65715..2b6103e 100644 --- a/arch/arm/mach-shmobile/board-bockw.c +++ b/arch/arm/mach-shmobile/board-bockw.c @@ -18,6 +18,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include +#include #include #include #include @@ -54,16 +56,28 @@ static struct resource smsc911x_resources[] = { DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */ }; +/* SDHI */ +static struct sh_mobile_sdhi_info sdhi0_info = { + .tmio_caps = MMC_CAP_SD_HIGHSPEED, + .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34, + .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT, +}; + static const struct pinctrl_map bockw_pinctrl_map[] = { /* SCIF0 */ PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778", "scif0_data_a", "scif0"), PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778", "scif0_ctrl", "scif0"), + /* SDHI0 */ + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778", + "sdhi0", "sdhi0"), }; #define FPGA 0x18200000 #define IRQ0MR 0x30 +#define PFC 0xfffc0000 +#define PUPR4 0x110 static void __init bockw_init(void) { void __iomem *base; @@ -76,6 +90,7 @@ static void __init bockw_init(void) ARRAY_SIZE(bockw_pinctrl_map)); r8a7778_pinmux_init(); + /* for SMSC */ base = ioremap_nocache(FPGA, SZ_1M); if (base) { /* @@ -98,6 +113,20 @@ static void __init bockw_init(void) smsc911x_resources, ARRAY_SIZE(smsc911x_resources), &smsc911x_data, sizeof(smsc911x_data)); } + + /* for SDHI */ + base = ioremap_nocache(PFC, 0x200); + if (base) { + /* + * FIXME + * + * SDHI CD/WP pin needs pull-up + */ + iowrite32(ioread32(base + PUPR4) | (3 << 26), base + PUPR4); + iounmap(base); + + r8a7778_sdhi_init(0, &sdhi0_info); + } } static const char *bockw_boards_compat_dt[] __initdata = {