From patchwork Thu Jun 20 13:08:14 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 2755771 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id CA3539F39E for ; Thu, 20 Jun 2013 13:08:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8C3332027D for ; Thu, 20 Jun 2013 13:08:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id CDDA4202C3 for ; Thu, 20 Jun 2013 13:08:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965395Ab3FTNI1 (ORCPT ); Thu, 20 Jun 2013 09:08:27 -0400 Received: from kirsty.vergenet.net ([202.4.237.240]:33854 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965397Ab3FTNI0 (ORCPT ); Thu, 20 Jun 2013 09:08:26 -0400 Received: from ayumi.isobedori.kobe.vergenet.net (p5212-ipbfp1903kobeminato.hyogo.ocn.ne.jp [114.172.132.212]) by kirsty.vergenet.net (Postfix) with ESMTP id 558BC266CEE; Thu, 20 Jun 2013 23:08:25 +1000 (EST) Received: by ayumi.isobedori.kobe.vergenet.net (Postfix, from userid 7100) id 00DBDEDE7CF; Thu, 20 Jun 2013 22:08:23 +0900 (JST) From: Simon Horman To: Arnd Bergmann , Olof Johansson Cc: linux-sh@vger.kernel.org, arm@kernel.org, linux-arm-kernel@lists.infradead.org, Magnus Damm , Guennadi Liakhovetski , Simon Horman Subject: [PATCH 3/3] ARM: shmobile: irqpin: add a DT property to enable masking on parent Date: Thu, 20 Jun 2013 22:08:14 +0900 Message-Id: <1371733694-27368-4-git-send-email-horms+renesas@verge.net.au> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1371733694-27368-1-git-send-email-horms+renesas@verge.net.au> References: <1371733694-27368-1-git-send-email-horms+renesas@verge.net.au> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-8.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Guennadi Liakhovetski To disable spurious interrupts, that get triggered on certain hardware, the irqpin driver masks them on the parent interrupt controller. To specify such broken devices a .control_parent parameter can be provided in the platform data. In the DT case we need a property, to do the same. Signed-off-by: Guennadi Liakhovetski Acked-by: Magnus Damm Signed-off-by: Simon Horman --- .../bindings/interrupt-controller/renesas,intc-irqpin.txt | 2 ++ drivers/irqchip/irq-renesas-intc-irqpin.c | 7 +++++-- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt index 66fcaf5..1f8b0c5 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt @@ -12,3 +12,5 @@ Optional properties: properties - sense-bitfield-width: width of a single sense bitfield in the SENSE register, if different from the default 4 bits +- control-parent: disable and enable interrupts on the parent interrupt + controller, needed for some broken implementations diff --git a/drivers/irqchip/irq-renesas-intc-irqpin.c b/drivers/irqchip/irq-renesas-intc-irqpin.c index 4aca1b2..82cec63 100644 --- a/drivers/irqchip/irq-renesas-intc-irqpin.c +++ b/drivers/irqchip/irq-renesas-intc-irqpin.c @@ -348,11 +348,14 @@ static int intc_irqpin_probe(struct platform_device *pdev) } /* deal with driver instance configuration */ - if (pdata) + if (pdata) { memcpy(&p->config, pdata, sizeof(*pdata)); - else + } else { of_property_read_u32(pdev->dev.of_node, "sense-bitfield-width", &p->config.sense_bitfield_width); + p->config.control_parent = of_property_read_bool(pdev->dev.of_node, + "control-parent"); + } if (!p->config.sense_bitfield_width) p->config.sense_bitfield_width = 4; /* default to 4 bits */