From patchwork Fri Jul 19 16:29:34 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guennadi Liakhovetski X-Patchwork-Id: 2830609 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 69E2CC0319 for ; Fri, 19 Jul 2013 16:30:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id EC7D92035F for ; Fri, 19 Jul 2013 16:30:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 761462035A for ; Fri, 19 Jul 2013 16:30:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934468Ab3GSQ3x (ORCPT ); Fri, 19 Jul 2013 12:29:53 -0400 Received: from moutng.kundenserver.de ([212.227.126.186]:57441 "EHLO moutng.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934401Ab3GSQ3v (ORCPT ); Fri, 19 Jul 2013 12:29:51 -0400 Received: from axis700.grange (dslb-178-006-255-036.pools.arcor-ip.net [178.6.255.36]) by mrelayeu.kundenserver.de (node=mreu4) with ESMTP (Nemesis) id 0LpDhh-1UWP360kej-00f7Ta; Fri, 19 Jul 2013 18:29:37 +0200 Received: from 6a.grange (6a.grange [192.168.1.11]) by axis700.grange (Postfix) with ESMTPS id 9BE2940BC5; Fri, 19 Jul 2013 18:29:35 +0200 (CEST) Received: from lyakh by 6a.grange with local (Exim 4.72) (envelope-from ) id 1V0DYl-0007rk-BQ; Fri, 19 Jul 2013 18:29:35 +0200 From: Guennadi Liakhovetski To: linux-kernel@vger.kernel.org Cc: linux-sh@vger.kernel.org, Magnus Damm , Simon Horman , Vinod Koul , Laurent Pinchart , Sergei Shtylyov , Guennadi Liakhovetski Subject: [PATCH v2 09/15] DMA: shdma: support referencing specific DMACs within a multiplexer in DT Date: Fri, 19 Jul 2013 18:29:34 +0200 Message-Id: <1374251374-30186-10-git-send-email-g.liakhovetski@gmx.de> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1374251374-30186-1-git-send-email-g.liakhovetski@gmx.de> References: <1374251374-30186-1-git-send-email-g.liakhovetski@gmx.de> X-Provags-ID: V02:K0:G+e2wK3c/0RYsRrID+6wE9ixABb2EoLkWjSU742bsTv 1+KGbN5Rd1de3Gpq7J2Ej7R32xx/BtiOCVgfhlcJLhIyFL2ke9 z4s6DMcWkVC6xOK2TbSl+gSR1UHbzgeaq0SQhIeeVtz8qRn3fH /pN+IxItxaoGdm1CEvZ+UJOONxxdnsiVTA0OFIXDGw7L0FXQif WS5Xsw6NllrnPvV6PYAlyMed1tO75X+4TqoZZK/ejABzf8YkkZ AXr544oCns/DE0NqMZrqmGKx5+6waF9+qa7IO/yieuFOJINxkx uDaWjISJTxF9q8ptxhCPgtBFpXFyJnCKM3nnddk2K8oRkhsOd+ LsOvd1uWw41zi9wSoqBVZGb2ebBpB+fv3SYEJXtEsY2rxSDFZK vBr6R2q/03BaQ== Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-7.3 required=5.0 tests=BAYES_00,FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently shdma DT nodes have to be placed under a multiplexer node. DMA slave DT nodes then use that multiplexer's phandle in their "dmas" properties. However, sometimes it can be necessary to let DMA slaves only use a specific DMAC instance. In this case it would be logical to just use the respective phandle in that slave's "dmas" property. For this to work the referenced DMAC has to register a struct of_dma instance, which isn't presently done. Instead the driver currently only registers one struct of_dma for the multiplexer. This patch adds support for such configurations. To enable this option a "#dma-cells" property also must be added to the respective DMAC DT node. Signed-off-by: Guennadi Liakhovetski --- Documentation/devicetree/bindings/dma/shdma.txt | 16 ++++++ drivers/dma/sh/shdma.h | 7 +++ drivers/dma/sh/shdmac.c | 66 +++++++++++++++++++++++ 3 files changed, 89 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/shdma.txt b/Documentation/devicetree/bindings/dma/shdma.txt index 7702e35..69ff80f 100644 --- a/Documentation/devicetree/bindings/dma/shdma.txt +++ b/Documentation/devicetree/bindings/dma/shdma.txt @@ -27,6 +27,22 @@ Required properties: "renesas,shdma-r8a7740" for the DMACs (not RTDMAC) on r8a7740 "renesas,shdma" for a generic DMAC +Optional properties: +- #dma-cells: this property is only needed in one specific case: if DMA slaves + have to be able to request channels specifically from this DMAC, + not from anyone from the multiplexer. In such a case the board + .dts file can contain code, similar to this: + +&dma1 { + #dma-cells = <1>; +}; + +&mmc0 { + dmas = <&dma1 0xd1 + &dma1 0xd2>; + dma-names = "tx", "rx"; +}; + Example: dmac: dma-mux0 { compatible = "renesas,shdma-mux"; diff --git a/drivers/dma/sh/shdma.h b/drivers/dma/sh/shdma.h index 8394424..991316f 100644 --- a/drivers/dma/sh/shdma.h +++ b/drivers/dma/sh/shdma.h @@ -23,6 +23,7 @@ #define SH_DMAE_TCR_MAX 0x00FFFFFF /* 16MB */ struct device; +struct device_node; struct sh_dmae_chan { struct shdma_chan shdma_chan; @@ -33,6 +34,11 @@ struct sh_dmae_chan { int pm_error; }; +struct sh_dmae_filter_info { + u32 hw_req; + struct device_node *of_node; +}; + struct sh_dmae_device { struct shdma_dev shdma_dev; struct sh_dmae_chan *chan[SH_DMAE_MAX_CHANNELS]; @@ -42,6 +48,7 @@ struct sh_dmae_device { void __iomem *dmars; unsigned int chcr_offset; u32 chcr_ie_bit; + struct sh_dmae_filter_info filter_info; }; struct sh_dmae_regs { diff --git a/drivers/dma/sh/shdmac.c b/drivers/dma/sh/shdmac.c index ae89261..0ddcddf 100644 --- a/drivers/dma/sh/shdmac.c +++ b/drivers/dma/sh/shdmac.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -665,6 +666,63 @@ static const struct shdma_ops sh_dmae_shdma_ops = { .get_partial = sh_dmae_get_partial, }; +static bool sh_dmae_chan_filter(struct dma_chan *chan, void *arg) +{ + struct sh_dmae_filter_info *info = arg; + struct shdma_chan *schan = to_shdma_chan(chan); + int match = info->hw_req; + + if (match < 0) + /* No slave requested - arbitrary channel */ + return true; + + dev_dbg(schan->dev, "%s(): trying %s for 0x%x\n", __func__, + info->of_node->full_name, match); + + if (schan->dev->of_node != info->of_node) + return false; + + return !sh_dmae_set_slave(schan, match, true); +} + +static struct dma_chan *sh_dmae_of_xlate(struct of_phandle_args *dma_spec, + struct of_dma *ofdma) +{ + struct sh_dmae_filter_info *info = ofdma->of_dma_data; + u32 id = dma_spec->args[0]; + dma_cap_mask_t mask; + struct dma_chan *chan; + + if (dma_spec->args_count != 1) + return NULL; + + dma_cap_zero(mask); + /* Only slave DMA channels can be allocated via DT */ + dma_cap_set(DMA_SLAVE, mask); + + info->hw_req = id; + info->of_node = dma_spec->np; + + chan = dma_request_channel(mask, sh_dmae_chan_filter, info); + if (chan) + to_shdma_chan(chan)->hw_req = id; + + return chan; +} + +static int sh_dmae_of_add(struct device *dev, struct sh_dmae_device *shdev) +{ + u32 cells; + int ret = of_property_read_u32(dev->of_node, "#dma-cells", &cells); + + dev_dbg(dev, "%s(): %u (%d)\n", __func__, cells, ret); + if (ret < 0 || !cells) + return 0; + + return of_dma_controller_register(dev->of_node, + sh_dmae_of_xlate, &shdev->filter_info); +} + static const struct of_device_id sh_dmae_of_match[] = { {.compatible = "renesas,shdma",}, {.compatible = "renesas,shdma-r8a73a4", .data = r8a73a4_shdma_devid,}, @@ -845,6 +903,10 @@ static int sh_dmae_probe(struct platform_device *pdev) } while (irq_cnt < pdata->channel_num && chanirq_res); } + err = sh_dmae_of_add(&pdev->dev, shdev); + if (err < 0) + goto of_add_err; + /* Create DMA Channel */ for (i = 0; i < irq_cnt; i++) { err = sh_dmae_chan_probe(shdev, i, chan_irq[i], chan_flag[i]); @@ -869,6 +931,8 @@ edmadevreg: pm_runtime_get(&pdev->dev); chan_probe_err: + of_dma_controller_free(pdev->dev.of_node); +of_add_err: sh_dmae_chan_remove(shdev); #if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_SHMOBILE) @@ -895,6 +959,8 @@ static int sh_dmae_remove(struct platform_device *pdev) struct sh_dmae_device *shdev = platform_get_drvdata(pdev); struct dma_device *dma_dev = &shdev->shdma_dev.dma_dev; + of_dma_controller_free(pdev->dev.of_node); + dma_async_device_unregister(dma_dev); spin_lock_irq(&sh_dmae_lock);