From patchwork Tue Oct 1 18:30:46 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Valentine Barshak X-Patchwork-Id: 2971321 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 19557BFF0B for ; Tue, 1 Oct 2013 18:31:00 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 00FA1201B4 for ; Tue, 1 Oct 2013 18:30:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C008F201F6 for ; Tue, 1 Oct 2013 18:30:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751473Ab3JASa5 (ORCPT ); Tue, 1 Oct 2013 14:30:57 -0400 Received: from mail-la0-f45.google.com ([209.85.215.45]:43883 "EHLO mail-la0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751390Ab3JASa5 (ORCPT ); Tue, 1 Oct 2013 14:30:57 -0400 Received: by mail-la0-f45.google.com with SMTP id eh20so6175822lab.4 for ; Tue, 01 Oct 2013 11:30:55 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=fNwN2HcFGoLpJHNPGzgQ+mL400amC8B0XgDaHD1ERS0=; b=cR+pk88lu8Vj6WErHBDS7sHlKsOVV8Tj5ueAb1nXjNkIZTTv9YZ0dCbHC7nnjHSOrE GYO/SFa/Z+AMmaWxjUHn31AhG2viIaqGw9VagHn7bcCUw7NVWr887HuHl8QBA0TwzoFT t/nqqbVeVzkVUWI6A6M78InIwrhmh4UoSe+oBoW+d5/bZ62c/9PdQMeG2x+H0L8r3OjE vhknKWif08WzaS3XxYXcMJG3qqBZGbfQKh7q5TP6yB6nUVey0mFMQc+a7wogeOte9biP yQU7UOV+rXtyAmCf1pbe9NvD+aOjhc9ORbE4PRETxvRJattHUoFDNmtansHSfts8GpxH EPDQ== X-Gm-Message-State: ALoCoQnvPfHJQyvzBeGlIFK5m7jNNapPkFNhiZqaIcKBROT0XzXCb/1mus2D40lxrMhYt/UhXRrG X-Received: by 10.112.42.68 with SMTP id m4mr28306529lbl.4.1380652255450; Tue, 01 Oct 2013 11:30:55 -0700 (PDT) Received: from black.localnet ([93.100.122.208]) by mx.google.com with ESMTPSA id e4sm4831790lba.15.1969.12.31.16.00.00 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 01 Oct 2013 11:30:54 -0700 (PDT) From: Valentine Barshak To: linux-sh@vger.kernel.org Cc: Simon Horman , Magnus Damm , Laurent Pinchart , Guennadi Liakhovetski Subject: [PATCH 1/6] arm: shmobile: r8a7790: Add USBHS clock support Date: Tue, 1 Oct 2013 22:30:46 +0400 Message-Id: <1380652251-8143-2-git-send-email-valentine.barshak@cogentembedded.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1380652251-8143-1-git-send-email-valentine.barshak@cogentembedded.com> References: <1380652251-8143-1-git-send-email-valentine.barshak@cogentembedded.com> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This adds USBHS clock support. Signed-off-by: Valentine Barshak --- arch/arm/mach-shmobile/clock-r8a7790.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c index a64f965..cf4abba 100644 --- a/arch/arm/mach-shmobile/clock-r8a7790.c +++ b/arch/arm/mach-shmobile/clock-r8a7790.c @@ -186,6 +186,7 @@ enum { MSTP813, MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720, MSTP717, MSTP716, + MSTP704, MSTP522, MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, @@ -208,6 +209,7 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */ [MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */ [MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */ + [MSTP704] = SH_CLK_MSTP32(&mp_clk, SMSTPCR7, 4, 0), /* HS_USB */ [MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */ [MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0], SMSTPCR3, 15, 0), /* MMC0 */ [MSTP314] = SH_CLK_MSTP32(&div4_clks[DIV4_SD0], SMSTPCR3, 14, 0), /* SDHI0 */ @@ -296,6 +298,7 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]), CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]), CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]), + CLKDEV_CON_ID("hsusb", &mstp_clks[MSTP704]), }; #define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31) \