From patchwork Tue Oct 15 09:08:23 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cao Minh Hiep X-Patchwork-Id: 3044041 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 1B9D49F2B7 for ; Tue, 15 Oct 2013 09:15:21 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 68254201ED for ; Tue, 15 Oct 2013 09:15:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D2CC4201FF for ; Tue, 15 Oct 2013 09:15:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751993Ab3JOJPL (ORCPT ); Tue, 15 Oct 2013 05:15:11 -0400 Received: from m119.secure.ne.jp ([158.199.161.240]:38134 "HELO m119.secure.ne.jp" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with SMTP id S1752457Ab3JOJPJ (ORCPT ); Tue, 15 Oct 2013 05:15:09 -0400 Received: (qmail 60909 invoked from network); 15 Oct 2013 18:08:27 +0900 Received: from unknown (HELO localhost) (61.118.107.10) by 0 with SMTP; 15 Oct 2013 18:08:27 +0900 From: Cao Minh Hiep To: linux-sh@vger.kernel.org, horms@verge.net.au Cc: magnus.damm@gmail.com, kuninori.morimoto.gx@renesas.com, yoshihiro.shimoda.uh@renesas.com Subject: [PATCH 1/2] ARM: shmobile: r8a7790: add QSPI support Date: Tue, 15 Oct 2013 18:08:23 +0900 Message-Id: <1381828104-31302-2-git-send-email-cm-hiep@jinso.co.jp> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1381828104-31302-1-git-send-email-cm-hiep@jinso.co.jp> References: <1381828104-31302-1-git-send-email-cm-hiep@jinso.co.jp> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hiep Cao Minh Add platform device and clock for the r8a7790 QSPI. Signed-off-by: Hiep Cao Minh --- arch/arm/mach-shmobile/clock-r8a7790.c | 4 ++++ arch/arm/mach-shmobile/include/mach/r8a7790.h | 2 ++ arch/arm/mach-shmobile/setup-r8a7790.c | 16 ++++++++++++++++ 3 files changed, 22 insertions(+) diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c index fc36d3d..baabceb 100644 --- a/arch/arm/mach-shmobile/clock-r8a7790.c +++ b/arch/arm/mach-shmobile/clock-r8a7790.c @@ -52,6 +52,7 @@ #define SMSTPCR5 0xe6150144 #define SMSTPCR7 0xe615014c #define SMSTPCR8 0xe6150990 +#define SMSTPCR9 0xE6150994 #define SDCKCR 0xE6150074 #define SD2CKCR 0xE6150078 @@ -181,6 +182,7 @@ static struct clk div6_clks[DIV6_NR] = { /* MSTP */ enum { + MSTP917, MSTP813, MSTP721, MSTP720, MSTP717, MSTP716, @@ -192,6 +194,7 @@ enum { }; static struct clk mstp_clks[MSTP_NR] = { + [MSTP917] = SH_CLK_MSTP32(&qspi_clk, SMSTPCR9, 17, 0), /* QSPI */ [MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */ [MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */ [MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */ @@ -276,6 +279,7 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]), CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]), CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]), + CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]), }; #define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31) \ diff --git a/arch/arm/mach-shmobile/include/mach/r8a7790.h b/arch/arm/mach-shmobile/include/mach/r8a7790.h index 788d559..d590cad 100644 --- a/arch/arm/mach-shmobile/include/mach/r8a7790.h +++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h @@ -1,5 +1,6 @@ #ifndef __ASM_R8A7790_H__ #define __ASM_R8A7790_H__ +#include void r8a7790_add_standard_devices(void); void r8a7790_add_dt_devices(void); @@ -7,6 +8,7 @@ void r8a7790_clock_init(void); void r8a7790_pinmux_init(void); void r8a7790_init_delay(void); void r8a7790_timer_init(void); +void r8a7790_add_qspi_device(struct rspi_plat_data *pdata); #define MD(nr) BIT(nr) u32 r8a7790_read_mode_pins(void); diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c index d0f5c9f..30e3362 100644 --- a/arch/arm/mach-shmobile/setup-r8a7790.c +++ b/arch/arm/mach-shmobile/setup-r8a7790.c @@ -30,6 +30,22 @@ #include #include #include +#include +#include + +/* QSPI resource */ +static struct resource qspi_resources[] __initdata = { + DEFINE_RES_MEM(0xe6b10000, 0x1000), + DEFINE_RES_IRQ(gic_spi(184)), +}; + +void __init r8a7790_add_qspi_device(struct rspi_plat_data *pdata) +{ + platform_device_register_resndata( + &platform_bus, "qspi", 0, + qspi_resources, ARRAY_SIZE(qspi_resources), + pdata, sizeof(*pdata)); +} static struct resource pfc_resources[] __initdata = { DEFINE_RES_MEM(0xe6060000, 0x250),