From patchwork Thu Oct 17 20:06:43 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Valentine Barshak X-Patchwork-Id: 3063491 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id DA3B29F243 for ; Thu, 17 Oct 2013 20:06:51 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C348520373 for ; Thu, 17 Oct 2013 20:06:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1A55A2030B for ; Thu, 17 Oct 2013 20:06:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1762700Ab3JQUGs (ORCPT ); Thu, 17 Oct 2013 16:06:48 -0400 Received: from mail-lb0-f171.google.com ([209.85.217.171]:65464 "EHLO mail-lb0-f171.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1762699Ab3JQUGs (ORCPT ); Thu, 17 Oct 2013 16:06:48 -0400 Received: by mail-lb0-f171.google.com with SMTP id x18so983063lbi.30 for ; Thu, 17 Oct 2013 13:06:46 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=Eg/hKseim3D7BBOjT8+1l7JBY1BO1JhVE5GBqgR8syc=; b=Wp5I1SJS4IgOBuz8srkoE9UevZoarfKyLq/r78VY9f6tvgrOhBhqbW2uoum3ClBL1q qkLa+hjQLDaKFauF6J0eHjbFjJ3oaGEVE2u/cHqWcOnDm3RF06ozfuF1Dc7HRQ2P7oqT w/xnO4VU3jUdBEu6Btj/8+qWrx+CjgL3c7yrqM6F7/lax/NOgGuhjk+K5ywuQVH1h/zp lwPlRKamFZpS/tS0ILGjjmb8N6fpzWwCcLTkNj1ff5ySLZegWr8SfcAgYbovIQLeenlI Jg5JEw6LxBAtrNgk+XLe1z88KlHM0CDXdKsW0UOYGt8yylIYxjSRRVeNUM/XBulPzCbQ zAsA== X-Gm-Message-State: ALoCoQnfKgTVBzW1CwFRDY9hy2phsEEddFJ+6qfQGkeCCrWmhZDRBTjm/eki9M4MZQC1Bpr7K6CL X-Received: by 10.153.11.134 with SMTP id ei6mr3234712lad.38.1382040406321; Thu, 17 Oct 2013 13:06:46 -0700 (PDT) Received: from black.localnet ([93.100.122.208]) by mx.google.com with ESMTPSA id kx1sm76350255lac.7.1969.12.31.16.00.00 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 17 Oct 2013 13:06:45 -0700 (PDT) From: Valentine Barshak To: linux-sh@vger.kernel.org Cc: Simon Horman , Magnus Damm , Kuninori Morimoto , Laurent Pinchart , Guennadi Liakhovetski , Linus Walleij Subject: [PATCH] pinctrl: sh-pfc: pfc-r8a7790: Add full VIN1/2/3 support Date: Fri, 18 Oct 2013 00:06:43 +0400 Message-Id: <1382040403-19649-1-git-send-email-valentine.barshak@cogentembedded.com> X-Mailer: git-send-email 1.8.3.1 Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-7.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This adds missing VIN1/2/3 pin configuration to pfc-r8a7790. Signed-off-by: Valentine Barshak --- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 202 ++++++++++++++++++++++++++++++++++- 1 file changed, 198 insertions(+), 4 deletions(-) diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c index 64fcc006..9ab2f71 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c @@ -2996,22 +2996,168 @@ static const unsigned int vin0_clk_mux[] = { VI0_CLK_MARK, }; /* - VIN1 ------------------------------------------------------------------- */ -static const unsigned int vin1_data_pins[] = { +static const unsigned int vin1_data_g_pins[] = { + RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 17), + RCAR_GP_PIN(1, 20), RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 12), + RCAR_GP_PIN(1, 9), RCAR_GP_PIN(1, 7), +}; +static const unsigned int vin1_data_g_mux[] = { + VI1_G0_MARK, VI1_G1_MARK, VI1_G2_MARK, + VI1_G3_MARK, VI1_G4_MARK, VI1_G5_MARK, + VI1_G6_MARK, VI1_G7_MARK, +}; +static const unsigned int vin1_data_r_pins[] = { + RCAR_GP_PIN(0, 27), RCAR_GP_PIN(0, 28), RCAR_GP_PIN(0, 29), + RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6), + RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 8), +}; +static const unsigned int vin1_data_r_mux[] = { + VI1_R0_MARK, VI1_R1_MARK, VI1_R2_MARK, + VI1_R3_MARK, VI1_R4_MARK, VI1_R5_MARK, + VI1_R6_MARK, VI1_R7_MARK, +}; +static const unsigned int vin1_data_b_pins[] = { RCAR_GP_PIN(2, 10), RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 12), RCAR_GP_PIN(2, 13), RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 15), RCAR_GP_PIN(2, 16), RCAR_GP_PIN(2, 17), }; -static const unsigned int vin1_data_mux[] = { +static const unsigned int vin1_data_b_mux[] = { VI1_DATA0_VI1_B0_MARK, VI1_DATA1_VI1_B1_MARK, VI1_DATA2_VI1_B2_MARK, VI1_DATA3_VI1_B3_MARK, VI1_DATA4_VI1_B4_MARK, VI1_DATA5_VI1_B5_MARK, VI1_DATA6_VI1_B6_MARK, VI1_DATA7_VI1_B7_MARK, }; +static const unsigned int vin1_hsync_signal_pins[] = { + RCAR_GP_PIN(1, 24), +}; +static const unsigned int vin1_hsync_signal_mux[] = { + VI1_HSYNC_N_MARK, +}; +static const unsigned int vin1_vsync_signal_pins[] = { + RCAR_GP_PIN(1, 25), +}; +static const unsigned int vin1_vsync_signal_mux[] = { + VI1_VSYNC_N_MARK, +}; +static const unsigned int vin1_field_signal_pins[] = { + RCAR_GP_PIN(1, 13), +}; +static const unsigned int vin1_field_signal_mux[] = { + VI1_FIELD_MARK, +}; +static const unsigned int vin1_data_enable_pins[] = { + RCAR_GP_PIN(1, 26), +}; +static const unsigned int vin1_data_enable_mux[] = { + VI1_CLKENB_MARK, +}; static const unsigned int vin1_clk_pins[] = { RCAR_GP_PIN(2, 9), }; static const unsigned int vin1_clk_mux[] = { VI1_CLK_MARK, }; +/* - VIN2 ----------------------------------------------------------------- */ +static const unsigned int vin2_data_g_pins[] = { + RCAR_GP_PIN(0, 27), RCAR_GP_PIN(0, 28), RCAR_GP_PIN(0, 29), + RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5), + RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7), +}; +static const unsigned int vin2_data_g_mux[] = { + VI2_G0_MARK, VI2_G1_MARK, VI2_G2_MARK, + VI2_G3_MARK, VI2_G4_MARK, VI2_G5_MARK, + VI2_G6_MARK, VI2_G7_MARK, +}; +static const unsigned int vin2_data_r_pins[] = { + RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13), RCAR_GP_PIN(1, 14), + RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 20), + RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 24), +}; +static const unsigned int vin2_data_r_mux[] = { + VI2_R0_MARK, VI2_R1_MARK, VI2_R2_MARK, + VI2_R3_MARK, VI2_R4_MARK, VI2_R5_MARK, + VI2_R6_MARK, VI2_R7_MARK, +}; +static const unsigned int vin2_data_b_pins[] = { + RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 10), + RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13), + RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15), +}; +static const unsigned int vin2_data_b_mux[] = { + VI2_DATA0_VI2_B0_MARK, VI2_DATA1_VI2_B1_MARK, VI2_DATA2_VI2_B2_MARK, + VI2_DATA3_VI2_B3_MARK, VI2_DATA4_VI2_B4_MARK, VI2_DATA5_VI2_B5_MARK, + VI2_DATA6_VI2_B6_MARK, VI2_DATA7_VI2_B7_MARK, +}; +static const unsigned int vin2_hsync_signal_pins[] = { + RCAR_GP_PIN(1, 16), +}; +static const unsigned int vin2_hsync_signal_mux[] = { + VI2_HSYNC_N_MARK, +}; +static const unsigned int vin2_vsync_signal_pins[] = { + RCAR_GP_PIN(1, 21), +}; +static const unsigned int vin2_vsync_signal_mux[] = { + VI2_VSYNC_N_MARK, +}; +static const unsigned int vin2_field_signal_pins[] = { + RCAR_GP_PIN(1, 9), +}; +static const unsigned int vin2_field_signal_mux[] = { + VI2_FIELD_MARK, +}; +static const unsigned int vin2_data_enable_pins[] = { + RCAR_GP_PIN(1, 8), +}; +static const unsigned int vin2_data_enable_mux[] = { + VI2_CLKENB_MARK, +}; +static const unsigned int vin2_clk_pins[] = { + RCAR_GP_PIN(1, 11), +}; +static const unsigned int vin2_clk_mux[] = { + VI2_CLK_MARK, +}; +/* - VIN3 ----------------------------------------------------------------- */ +static const unsigned int vin3_data_pins[] = { + RCAR_GP_PIN(0, 0), RCAR_GP_PIN(0, 1), RCAR_GP_PIN(0, 2), + RCAR_GP_PIN(0, 3), RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5), + RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7), +}; +static const unsigned int vin3_data_mux[] = { + VI3_DATA0_MARK, VI3_DATA1_MARK, VI3_DATA2_MARK, + VI3_DATA3_MARK, VI3_DATA4_MARK, VI3_DATA5_MARK, + VI3_DATA6_MARK, VI3_DATA7_MARK, +}; +static const unsigned int vin3_hsync_signal_pins[] = { + RCAR_GP_PIN(1, 16), +}; +static const unsigned int vin3_hsync_signal_mux[] = { + VI3_HSYNC_N_MARK, +}; +static const unsigned int vin3_vsync_signal_pins[] = { + RCAR_GP_PIN(1, 17), +}; +static const unsigned int vin3_vsync_signal_mux[] = { + VI2_VSYNC_N_MARK, +}; +static const unsigned int vin3_field_signal_pins[] = { + RCAR_GP_PIN(1, 15), +}; +static const unsigned int vin3_field_signal_mux[] = { + VI3_FIELD_MARK, +}; +static const unsigned int vin3_data_enable_pins[] = { + RCAR_GP_PIN(1, 14), +}; +static const unsigned int vin3_data_enable_mux[] = { + VI3_CLKENB_MARK, +}; +static const unsigned int vin3_clk_pins[] = { + RCAR_GP_PIN(1, 23), +}; +static const unsigned int vin3_clk_mux[] = { + VI3_CLK_MARK, +}; static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(du_rgb666), @@ -3185,8 +3331,28 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(vin0_field_signal), SH_PFC_PIN_GROUP(vin0_data_enable), SH_PFC_PIN_GROUP(vin0_clk), - SH_PFC_PIN_GROUP(vin1_data), + SH_PFC_PIN_GROUP(vin1_data_g), + SH_PFC_PIN_GROUP(vin1_data_r), + SH_PFC_PIN_GROUP(vin1_data_b), + SH_PFC_PIN_GROUP(vin1_hsync_signal), + SH_PFC_PIN_GROUP(vin1_vsync_signal), + SH_PFC_PIN_GROUP(vin1_field_signal), + SH_PFC_PIN_GROUP(vin1_data_enable), SH_PFC_PIN_GROUP(vin1_clk), + SH_PFC_PIN_GROUP(vin2_data_g), + SH_PFC_PIN_GROUP(vin2_data_r), + SH_PFC_PIN_GROUP(vin2_data_b), + SH_PFC_PIN_GROUP(vin2_hsync_signal), + SH_PFC_PIN_GROUP(vin2_vsync_signal), + SH_PFC_PIN_GROUP(vin2_field_signal), + SH_PFC_PIN_GROUP(vin2_data_enable), + SH_PFC_PIN_GROUP(vin2_clk), + SH_PFC_PIN_GROUP(vin3_data), + SH_PFC_PIN_GROUP(vin3_hsync_signal), + SH_PFC_PIN_GROUP(vin3_vsync_signal), + SH_PFC_PIN_GROUP(vin3_field_signal), + SH_PFC_PIN_GROUP(vin3_data_enable), + SH_PFC_PIN_GROUP(vin3_clk), }; static const char * const du_groups[] = { @@ -3457,10 +3623,36 @@ static const char * const vin0_groups[] = { }; static const char * const vin1_groups[] = { - "vin1_data", + "vin1_data_g", + "vin1_data_r", + "vin1_data_b", + "vin1_hsync_signal", + "vin1_vsync_signal", + "vin1_field_signal", + "vin1_data_enable", "vin1_clk", }; +static const char * const vin2_groups[] = { + "vin2_data_g", + "vin2_data_r", + "vin2_data_b", + "vin2_hsync_signal", + "vin2_vsync_signal", + "vin2_field_signal", + "vin2_data_enable", + "vin2_clk", +}; + +static const char * const vin3_groups[] = { + "vin3_data", + "vin3_hsync_signal", + "vin3_vsync_signal", + "vin3_field_signal", + "vin3_data_enable", + "vin3_clk", +}; + static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(du), SH_PFC_FUNCTION(du0), @@ -3495,6 +3687,8 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(usb2), SH_PFC_FUNCTION(vin0), SH_PFC_FUNCTION(vin1), + SH_PFC_FUNCTION(vin2), + SH_PFC_FUNCTION(vin3), }; static struct pinmux_cfg_reg pinmux_config_regs[] = {