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[1/2,v4] ARM: shmobile: r8a7790: add QSPI support

Message ID 1382408472-20315-2-git-send-email-cm-hiep@jinso.co.jp (mailing list archive)
State Superseded
Commit d62fb508021740951b9c3af69d96a2e00d4b57c0
Headers show

Commit Message

Cao Minh Hiep Oct. 22, 2013, 2:21 a.m. UTC 
From: Hiep Cao Minh <cm-hiep@jinso.co.jp>

Adds support for QSPI on the r8a7790.

Signed-off-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
---
 arch/arm/mach-shmobile/clock-r8a7790.c |    3 +++
 1 file changed, 3 insertions(+)
diff mbox

Patch

diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index a64f965..0ef7b54 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -183,6 +183,7 @@  static struct clk div6_clks[DIV6_NR] = {
 /* MSTP */
 enum {
 	MSTP931, MSTP930, MSTP929, MSTP928,
+	MSTP917,
 	MSTP813,
 	MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720,
 	MSTP717, MSTP716,
@@ -198,6 +199,7 @@  static struct clk mstp_clks[MSTP_NR] = {
 	[MSTP930] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 30, 0), /* I2C1 */
 	[MSTP929] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 29, 0), /* I2C2 */
 	[MSTP928] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 28, 0), /* I2C3 */
+	[MSTP917] = SH_CLK_MSTP32(&qspi_clk, SMSTPCR9, 17, 0), /* QSPI */
 	[MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
 	[MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
 	[MSTP725] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 25, 0), /* LVDS1 */
@@ -296,6 +298,7 @@  static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
 	CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
 	CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
+	CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
 };
 
 #define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31)		\