From patchwork Tue Dec 17 21:44:36 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfram Sang X-Patchwork-Id: 3366111 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id BDC7DC0D4A for ; Tue, 17 Dec 2013 21:44:56 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E62AB20260 for ; Tue, 17 Dec 2013 21:44:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0342A20304 for ; Tue, 17 Dec 2013 21:44:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753607Ab3LQVoy (ORCPT ); Tue, 17 Dec 2013 16:44:54 -0500 Received: from sauhun.de ([89.238.76.85]:42151 "EHLO pokefinder.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753001Ab3LQVoy (ORCPT ); Tue, 17 Dec 2013 16:44:54 -0500 Received: from p4fe24b4c.dip0.t-ipconnect.de ([79.226.75.76]:44331 helo=localhost) by pokefinder.org with esmtpsa (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.69) (envelope-from ) id 1Vt2Rh-0002mi-7d; Tue, 17 Dec 2013 22:44:53 +0100 From: Wolfram Sang To: linux-sh@vger.kernel.org Cc: linux-i2c@vger.kernel.org, Magnus Damm , Laurent Pinchart , Simon Horman , linux-arm-kernel@lists.infradead.org, Wolfram Sang Subject: [PATCH 3/5] arm: shmobile: r7s72100: add nodes for i2c controllers to dtsi Date: Tue, 17 Dec 2013 22:44:36 +0100 Message-Id: <1387316678-10174-4-git-send-email-wsa@the-dreams.de> X-Mailer: git-send-email 1.8.4.2 In-Reply-To: <1387316678-10174-1-git-send-email-wsa@the-dreams.de> References: <1387316678-10174-1-git-send-email-wsa@the-dreams.de> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Wolfram Sang I decided to put the pinmuxing into the dtsi file since there is only one pinmux posiibility which one probably wants to have when using the bus. Signed-off-by: Wolfram Sang Acked-by: Magnus Damm --- arch/arm/boot/dts/r7s72100.dtsi | 102 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 102 insertions(+) diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi index d396b38..ff0bd6b 100644 --- a/arch/arm/boot/dts/r7s72100.dtsi +++ b/arch/arm/boot/dts/r7s72100.dtsi @@ -8,6 +8,8 @@ * kind, whether express or implied. */ +#include + / { compatible = "renesas,r7s72100"; interrupt-parent = <&gic>; @@ -15,6 +17,10 @@ #size-cells = <1>; aliases { + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; gpio0 = &port0; gpio1 = &port1; gpio2 = &port2; @@ -58,6 +64,26 @@ <0xfcfe7b40 0x04>, /* JPMC */ <0xfcfe7b90 0x04>, /* JPMCSR */ <0xfcfe7f00 0x04>; /* JPIBC */ + + riic0_pins: i2c0 { + renesas,groups = "riic0_scl_p1_0", "riic0_sda_p1_1"; + renesas,function = "riic0"; + }; + + riic1_pins: i2c1 { + renesas,groups = "riic1_scl_p1_2", "riic1_sda_p1_3"; + renesas,function = "riic1"; + }; + + riic2_pins: i2c2 { + renesas,groups = "riic2_scl_p1_4", "riic2_sda_p1_5"; + renesas,function = "riic2"; + }; + + riic3_pins: i2c3 { + renesas,groups = "riic3_scl_p1_6", "riic3_sda_p1_7"; + renesas,function = "riic3"; + }; }; port0: gpio@fcfe3100 { @@ -187,4 +213,80 @@ gpio-controller; gpio-ranges = <&pfc 0 192 2>; }; + + i2c0: i2c@fcfee000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,riic-r7s72100", "renesas,riic-rz"; + reg = <0xfcfee000 0x44>; + interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>, + <0 158 IRQ_TYPE_EDGE_RISING>, + <0 159 IRQ_TYPE_EDGE_RISING>, + <0 160 IRQ_TYPE_LEVEL_HIGH>, + <0 161 IRQ_TYPE_LEVEL_HIGH>, + <0 162 IRQ_TYPE_LEVEL_HIGH>, + <0 163 IRQ_TYPE_LEVEL_HIGH>, + <0 164 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-0 = <&riic0_pins>; + pinctrl-names = "default"; + clock-frequency = <100000>; + status = "disabled"; + }; + + i2c1: i2c@fcfee400 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,riic-r7s72100", "renesas,riic-rz"; + reg = <0xfcfee400 0x44>; + interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>, + <0 166 IRQ_TYPE_EDGE_RISING>, + <0 167 IRQ_TYPE_EDGE_RISING>, + <0 168 IRQ_TYPE_LEVEL_HIGH>, + <0 169 IRQ_TYPE_LEVEL_HIGH>, + <0 170 IRQ_TYPE_LEVEL_HIGH>, + <0 171 IRQ_TYPE_LEVEL_HIGH>, + <0 172 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-0 = <&riic1_pins>; + pinctrl-names = "default"; + clock-frequency = <100000>; + status = "disabled"; + }; + + i2c2: i2c@fcfee800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,riic-r7s72100", "renesas,riic-rz"; + reg = <0xfcfee800 0x44>; + interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>, + <0 174 IRQ_TYPE_EDGE_RISING>, + <0 175 IRQ_TYPE_EDGE_RISING>, + <0 176 IRQ_TYPE_LEVEL_HIGH>, + <0 177 IRQ_TYPE_LEVEL_HIGH>, + <0 178 IRQ_TYPE_LEVEL_HIGH>, + <0 179 IRQ_TYPE_LEVEL_HIGH>, + <0 180 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-0 = <&riic2_pins>; + pinctrl-names = "default"; + clock-frequency = <100000>; + status = "disabled"; + }; + + i2c3: i2c@fcfeec00 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,riic-r7s72100", "renesas,riic-rz"; + reg = <0xfcfeec00 0x44>; + interrupts = <0 181 IRQ_TYPE_LEVEL_HIGH>, + <0 182 IRQ_TYPE_EDGE_RISING>, + <0 183 IRQ_TYPE_EDGE_RISING>, + <0 184 IRQ_TYPE_LEVEL_HIGH>, + <0 185 IRQ_TYPE_LEVEL_HIGH>, + <0 186 IRQ_TYPE_LEVEL_HIGH>, + <0 187 IRQ_TYPE_LEVEL_HIGH>, + <0 188 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-0 = <&riic3_pins>; + pinctrl-names = "default"; + clock-frequency = <100000>; + status = "disabled"; + }; };