diff mbox

[V2,2/5] arm: shmobile: r7s72100: add i2c clocks

Message ID 1387402321-21866-3-git-send-email-wsa@the-dreams.de (mailing list archive)
State Accepted
Commit d85bcfa916ffdf078f188aeab60f738b290f4309
Headers show

Commit Message

Wolfram Sang Dec. 18, 2013, 9:31 p.m. UTC 
From: Wolfram Sang <wsa@sang-engineering.com>

Tested with RIIC2 on a genmai board. Others untested but hopefully
trivial enough to be added.

Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Acked-by: Magnus Damm <damm@opensource.se>
---

V2: adapt to established sorting

 arch/arm/mach-shmobile/clock-r7s72100.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

Comments

Simon Horman Dec. 24, 2013, 2:48 a.m. UTC | #1 
On Wed, Dec 18, 2013 at 10:31:58PM +0100, Wolfram Sang wrote:
> From: Wolfram Sang <wsa@sang-engineering.com>
> 
> Tested with RIIC2 on a genmai board. Others untested but hopefully
> trivial enough to be added.
> 
> Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
> Acked-by: Magnus Damm <damm@opensource.se>
> ---
> 
> V2: adapt to established sorting

Thanks. This seems safe enough and I will queue it up.

> 
>  arch/arm/mach-shmobile/clock-r7s72100.c | 12 +++++++++++-
>  1 file changed, 11 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
> index 7b457ae..9cda215 100644
> --- a/arch/arm/mach-shmobile/clock-r7s72100.c
> +++ b/arch/arm/mach-shmobile/clock-r7s72100.c
> @@ -27,6 +27,7 @@
>  #define FRQCR2		0xfcfe0014
>  #define STBCR3		0xfcfe0420
>  #define STBCR4		0xfcfe0424
> +#define STBCR9		0xfcfe0438
>  
>  #define PLL_RATE 30
>  
> @@ -144,10 +145,15 @@ struct clk div4_clks[DIV4_NR] = {
>  					| CLK_ENABLE_ON_INIT),
>  };
>  
> -enum { MSTP47, MSTP46, MSTP45, MSTP44, MSTP43, MSTP42, MSTP41, MSTP40,
> +enum {	MSTP97, MSTP96, MSTP95, MSTP94,
> +	MSTP47, MSTP46, MSTP45, MSTP44, MSTP43, MSTP42, MSTP41, MSTP40,
>  	MSTP33,	MSTP_NR };
>  
>  static struct clk mstp_clks[MSTP_NR] = {
> +	[MSTP97] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 7, 0), /* RIIC0 */
> +	[MSTP96] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 6, 0), /* RIIC1 */
> +	[MSTP95] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 5, 0), /* RIIC2 */
> +	[MSTP94] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 4, 0), /* RIIC3 */
>  	[MSTP47] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 7, 0), /* SCIF0 */
>  	[MSTP46] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 6, 0), /* SCIF1 */
>  	[MSTP45] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 5, 0), /* SCIF2 */
> @@ -170,6 +176,10 @@ static struct clk_lookup lookups[] = {
>  	CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
>  
>  	/* MSTP clocks */
> +	CLKDEV_DEV_ID("fcfee000.i2c", &mstp_clks[MSTP97]),
> +	CLKDEV_DEV_ID("fcfee400.i2c", &mstp_clks[MSTP96]),
> +	CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]),
> +	CLKDEV_DEV_ID("fcfeec00.i2c", &mstp_clks[MSTP94]),
>  	CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP33]),
>  
>  	/* ICK */
> -- 
> 1.8.4.2
> 
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Geert Uytterhoeven Dec. 26, 2013, 9:20 p.m. UTC | #2 
On Tue, Dec 24, 2013 at 3:48 AM, Simon Horman <horms@verge.net.au> wrote:
> On Wed, Dec 18, 2013 at 10:31:58PM +0100, Wolfram Sang wrote:
>> From: Wolfram Sang <wsa@sang-engineering.com>
>>
>> Tested with RIIC2 on a genmai board. Others untested but hopefully
>> trivial enough to be added.
>>
>> Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
>> Acked-by: Magnus Damm <damm@opensource.se>
>> ---
>>
>> V2: adapt to established sorting
>
> Thanks. This seems safe enough and I will queue it up.

Note that after dropping these lines:

       CLKDEV_DEV_ID("fcfee000.i2c", &mstp_clks[MSTP97]),
       CLKDEV_DEV_ID("fcfee400.i2c", &mstp_clks[MSTP96]),
       CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]),
       CLKDEV_DEV_ID("fcfeec00.i2c", &mstp_clks[MSTP94]),

i2c stopped working.

Before:

of_irq_parse_one: dev=/i2c@fcfee800/eeprom@50, index=0
at24 2-0050: 16384 byte 24c128 EEPROM, writable, 64 bytes/write
i2c-riic fcfee800.i2c: registered with 400000Hz bus speed

After:

i2c-riic fcfee800.i2c: missing controller clock
i2c-riic: probe of fcfee800.i2c failed with error -2

Am I missing some other patch?

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
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Wolfram Sang Dec. 26, 2013, 9:25 p.m. UTC | #3 
On Thu, Dec 26, 2013 at 10:20:23PM +0100, Geert Uytterhoeven wrote:
> On Tue, Dec 24, 2013 at 3:48 AM, Simon Horman <horms@verge.net.au> wrote:
> > On Wed, Dec 18, 2013 at 10:31:58PM +0100, Wolfram Sang wrote:
> >> From: Wolfram Sang <wsa@sang-engineering.com>
> >>
> >> Tested with RIIC2 on a genmai board. Others untested but hopefully
> >> trivial enough to be added.
> >>
> >> Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
> >> Acked-by: Magnus Damm <damm@opensource.se>
> >> ---
> >>
> >> V2: adapt to established sorting
> >
> > Thanks. This seems safe enough and I will queue it up.
> 
> Note that after dropping these lines:
> 
>        CLKDEV_DEV_ID("fcfee000.i2c", &mstp_clks[MSTP97]),
>        CLKDEV_DEV_ID("fcfee400.i2c", &mstp_clks[MSTP96]),
>        CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]),
>        CLKDEV_DEV_ID("fcfeec00.i2c", &mstp_clks[MSTP94]),
> 
> i2c stopped working.

??? Why do you want to drop these lines?

If the i2c clocks are not registered, you won't get i2c support? Am I
missing something?
Geert Uytterhoeven Dec. 26, 2013, 9:34 p.m. UTC | #4 
On Thu, Dec 26, 2013 at 10:25 PM, Wolfram Sang <wsa@the-dreams.de> wrote:
> On Thu, Dec 26, 2013 at 10:20:23PM +0100, Geert Uytterhoeven wrote:
>> On Tue, Dec 24, 2013 at 3:48 AM, Simon Horman <horms@verge.net.au> wrote:
>> > On Wed, Dec 18, 2013 at 10:31:58PM +0100, Wolfram Sang wrote:
>> >> From: Wolfram Sang <wsa@sang-engineering.com>
>> >>
>> >> Tested with RIIC2 on a genmai board. Others untested but hopefully
>> >> trivial enough to be added.
>> >>
>> >> Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
>> >> Acked-by: Magnus Damm <damm@opensource.se>
>> >> ---
>> >>
>> >> V2: adapt to established sorting
>> >
>> > Thanks. This seems safe enough and I will queue it up.
>>
>> Note that after dropping these lines:
>>
>>        CLKDEV_DEV_ID("fcfee000.i2c", &mstp_clks[MSTP97]),
>>        CLKDEV_DEV_ID("fcfee400.i2c", &mstp_clks[MSTP96]),
>>        CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]),
>>        CLKDEV_DEV_ID("fcfeec00.i2c", &mstp_clks[MSTP94]),
>>
>> i2c stopped working.
>
> ??? Why do you want to drop these lines?

Your v2 dropped them, presumably in response to Sergei's ICKy comments.
And that's what Simon committed...

> If the i2c clocks are not registered, you won't get i2c support? Am I
> missing something?

Ah OK. So you do need them. Good, /me getting less confused ;-)

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
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Geert Uytterhoeven Dec. 26, 2013, 9:51 p.m. UTC | #5 
On Thu, Dec 26, 2013 at 10:34 PM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
>>> Note that after dropping these lines:
>>>
>>>        CLKDEV_DEV_ID("fcfee000.i2c", &mstp_clks[MSTP97]),
>>>        CLKDEV_DEV_ID("fcfee400.i2c", &mstp_clks[MSTP96]),
>>>        CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]),
>>>        CLKDEV_DEV_ID("fcfeec00.i2c", &mstp_clks[MSTP94]),
>>>
>>> i2c stopped working.
>>
>> ??? Why do you want to drop these lines?
>
> Your v2 dropped them, presumably in response to Sergei's ICKy comments.
> And that's what Simon committed...

Upon checking again, your v2 did contain them, but gmail tried to smart
me out by not showing those few lines.
So it must have been Simon who dropped them, or lost them during rebase?

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
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Simon Horman Dec. 27, 2013, 2:01 a.m. UTC | #6 
On Thu, Dec 26, 2013 at 10:51:34PM +0100, Geert Uytterhoeven wrote:
> On Thu, Dec 26, 2013 at 10:34 PM, Geert Uytterhoeven
> <geert@linux-m68k.org> wrote:
> >>> Note that after dropping these lines:
> >>>
> >>>        CLKDEV_DEV_ID("fcfee000.i2c", &mstp_clks[MSTP97]),
> >>>        CLKDEV_DEV_ID("fcfee400.i2c", &mstp_clks[MSTP96]),
> >>>        CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]),
> >>>        CLKDEV_DEV_ID("fcfeec00.i2c", &mstp_clks[MSTP94]),
> >>>
> >>> i2c stopped working.
> >>
> >> ??? Why do you want to drop these lines?
> >
> > Your v2 dropped them, presumably in response to Sergei's ICKy comments.
> > And that's what Simon committed...
> 
> Upon checking again, your v2 did contain them, but gmail tried to smart
> me out by not showing those few lines.
> So it must have been Simon who dropped them, or lost them during rebase?

Yes, it seems so. Sorry about that!

Wolfram, could you post the these missing clocks as an incremental patch?
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diff mbox

Patch

diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
index 7b457ae..9cda215 100644
--- a/arch/arm/mach-shmobile/clock-r7s72100.c
+++ b/arch/arm/mach-shmobile/clock-r7s72100.c
@@ -27,6 +27,7 @@ 
 #define FRQCR2		0xfcfe0014
 #define STBCR3		0xfcfe0420
 #define STBCR4		0xfcfe0424
+#define STBCR9		0xfcfe0438
 
 #define PLL_RATE 30
 
@@ -144,10 +145,15 @@  struct clk div4_clks[DIV4_NR] = {
 					| CLK_ENABLE_ON_INIT),
 };
 
-enum { MSTP47, MSTP46, MSTP45, MSTP44, MSTP43, MSTP42, MSTP41, MSTP40,
+enum {	MSTP97, MSTP96, MSTP95, MSTP94,
+	MSTP47, MSTP46, MSTP45, MSTP44, MSTP43, MSTP42, MSTP41, MSTP40,
 	MSTP33,	MSTP_NR };
 
 static struct clk mstp_clks[MSTP_NR] = {
+	[MSTP97] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 7, 0), /* RIIC0 */
+	[MSTP96] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 6, 0), /* RIIC1 */
+	[MSTP95] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 5, 0), /* RIIC2 */
+	[MSTP94] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 4, 0), /* RIIC3 */
 	[MSTP47] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 7, 0), /* SCIF0 */
 	[MSTP46] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 6, 0), /* SCIF1 */
 	[MSTP45] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 5, 0), /* SCIF2 */
@@ -170,6 +176,10 @@  static struct clk_lookup lookups[] = {
 	CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
 
 	/* MSTP clocks */
+	CLKDEV_DEV_ID("fcfee000.i2c", &mstp_clks[MSTP97]),
+	CLKDEV_DEV_ID("fcfee400.i2c", &mstp_clks[MSTP96]),
+	CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]),
+	CLKDEV_DEV_ID("fcfeec00.i2c", &mstp_clks[MSTP94]),
 	CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP33]),
 
 	/* ICK */