From patchwork Thu Dec 19 17:59:04 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Valentine Barshak X-Patchwork-Id: 3383811 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 4CEC39F314 for ; Thu, 19 Dec 2013 17:59:14 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5160A206A1 for ; Thu, 19 Dec 2013 17:59:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 34ECF2069A for ; Thu, 19 Dec 2013 17:59:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753547Ab3LSR7L (ORCPT ); Thu, 19 Dec 2013 12:59:11 -0500 Received: from mail-la0-f43.google.com ([209.85.215.43]:58591 "EHLO mail-la0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753403Ab3LSR7K (ORCPT ); Thu, 19 Dec 2013 12:59:10 -0500 Received: by mail-la0-f43.google.com with SMTP id n7so640013lam.30 for ; Thu, 19 Dec 2013 09:59:09 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=2fUyJv4PaXwmAbVCyhJ37nIYDX3wASJ2r/kYeI/fjos=; b=iF+x9kw9Tdj5f69mFL6JUqfnjDNB+SfWAam5wiRq9d8+tEFWP/OD+ZDSsH6iJej4jN L2j0rfRhmFNN8Eyvu6mruj+iqbmcze+gky2Id/dKSf10I8NWmwshPVUa1u6qU2PJoh2k ZxnCOCKzaA/F7UTizdvj3PPVYXnL/OpOV1VT+F/JehfGbtaKA0GMiiWLZ85iJcATSGBa 0oJHuSHvlJCTEh0UjcNPWDEIkzssRynr4cmAkWQVzIP5oi2/HJ0PrhbXkj9ndmOHHmx+ NVtY9Zvg+oOJ+xpyseh5mpbUs6H7NeXCqdBNoI6Zz8U08O2jZSFzf06tMkfQRisvmvL8 rbDA== X-Gm-Message-State: ALoCoQnxQRvd5kB5odkZId2Zbo2jmHuKHVZh05wT6nGe6j/d4TDAdgSleHIxIxx2C9sK7WcQRyZG X-Received: by 10.152.1.5 with SMTP id 5mr1398961lai.20.1387475949516; Thu, 19 Dec 2013 09:59:09 -0800 (PST) Received: from black.localnet ([93.100.122.208]) by mx.google.com with ESMTPSA id a8sm3659674lae.5.2013.12.19.09.59.07 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 19 Dec 2013 09:59:08 -0800 (PST) From: Valentine Barshak To: linux-sh@vger.kernel.org Cc: Simon Horman , Magnus Damm , Kuninori Morimoto , Laurent Pinchart Subject: [PATCH 1/2] arm: shmobile: r8a7791: Add SATA clocks Date: Thu, 19 Dec 2013 21:59:04 +0400 Message-Id: <1387475945-25995-2-git-send-email-valentine.barshak@cogentembedded.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1387475945-25995-1-git-send-email-valentine.barshak@cogentembedded.com> References: <1387475945-25995-1-git-send-email-valentine.barshak@cogentembedded.com> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_FRT_STOCK2, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This adds SATA 0/1 clock support. External 100MHz SATA 0/1 reference clock is supposed to be applied to the following pins: CICREFP0_SATA/CICREFP1_SATA; CICREFN0_SATA/CICREFN1_SATA. Signed-off-by: Valentine Barshak --- arch/arm/mach-shmobile/clock-r8a7791.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c index f546126..01a0314 100644 --- a/arch/arm/mach-shmobile/clock-r8a7791.c +++ b/arch/arm/mach-shmobile/clock-r8a7791.c @@ -78,6 +78,18 @@ static struct clk extal_clk = { .mapping = &cpg_mapping, }; +/* External SATA0 reference clock: 100MHz fixed */ +static struct clk sata0_clk = { + .rate = 100000000, + .mapping = &cpg_mapping, +}; + +/* External SATA1 reference clock: 100MHz fixed */ +static struct clk sata1_clk = { + .rate = 100000000, + .mapping = &cpg_mapping, +}; + static struct sh_clk_ops followparent_clk_ops = { .recalc = followparent_recalc, }; @@ -118,10 +130,13 @@ static struct clk *main_clks[] = { &mp_clk, &cp_clk, &zx_clk, + &sata0_clk, + &sata1_clk, }; /* MSTP */ enum { + MSTP815, MSTP814, MSTP813, MSTP726, MSTP724, MSTP723, MSTP721, MSTP720, MSTP719, MSTP718, MSTP715, MSTP714, @@ -133,6 +148,8 @@ enum { }; static struct clk mstp_clks[MSTP_NR] = { + [MSTP815] = SH_CLK_MSTP32(&sata0_clk, SMSTPCR8, 15, 0), /* SATA0 */ + [MSTP814] = SH_CLK_MSTP32(&sata1_clk, SMSTPCR8, 14, 0), /* SATA1 */ [MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */ [MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */ [MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */ @@ -195,6 +212,8 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]), CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]), CLKDEV_DEV_ID("r8a7791-ether", &mstp_clks[MSTP813]), /* Ether */ + CLKDEV_DEV_ID("sata-r8a7791.0", &mstp_clks[MSTP815]), + CLKDEV_DEV_ID("sata-r8a7791.1", &mstp_clks[MSTP814]), }; #define R8A7791_CLOCK_ROOT(e, m, p0, p1, p30, p31) \