From patchwork Fri Dec 20 14:14:27 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Valentine Barshak X-Patchwork-Id: 3389251 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 6D55F9F380 for ; Fri, 20 Dec 2013 14:14:42 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 16A16206E6 for ; Fri, 20 Dec 2013 14:14:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E56B4206E2 for ; Fri, 20 Dec 2013 14:14:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030197Ab3LTOOj (ORCPT ); Fri, 20 Dec 2013 09:14:39 -0500 Received: from mail-la0-f51.google.com ([209.85.215.51]:43328 "EHLO mail-la0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1030202Ab3LTOOi (ORCPT ); Fri, 20 Dec 2013 09:14:38 -0500 Received: by mail-la0-f51.google.com with SMTP id ec20so1109919lab.38 for ; Fri, 20 Dec 2013 06:14:37 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=OP3eR2v02hE5IkJ5G0YPCNf/st/8664bEUjkDwajXMI=; b=YkuM1Cfgywh2qk9wnxaTxUE7GGEIKEvoN6VafRRdyNeEFl+9NBEQukRSRoHbL4fry/ 45dtFrygL/pdty0L0xV20Q89DYAiCDl4guze4d0Chn9opX+liUXxlO26yBnkgnSpyCxW mTBn72nsxoeGIZAROVWM6WTn+JaHrmLPcXUv6N3u9LoUsmMZrxnTB9QZdUrDyOl1iU5/ O3MX9YSoAdLgo816oZbJbM13pH6KFWBYKmflrKF/Ni7ePMkv4PnYrfV4Z2wnxW28xAFf JJyNzNaaeI/JhFNlbIT8SgMBi6zMWvWNEeueGjhqw/Z8zmhKToEPa0/sSziIo+31cNIi vbWg== X-Gm-Message-State: ALoCoQnw+Q+uFllhdTr9jPLfsdsrFdWKewTp+432T1lCN7/cIpOfqkJNNxKc3zAkjp2yLvIEcIbu X-Received: by 10.112.89.42 with SMTP id bl10mr3395778lbb.18.1387548877590; Fri, 20 Dec 2013 06:14:37 -0800 (PST) Received: from black.localnet ([93.100.122.208]) by mx.google.com with ESMTPSA id e10sm6185043laa.6.2013.12.20.06.14.36 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 20 Dec 2013 06:14:36 -0800 (PST) From: Valentine Barshak To: linux-sh@vger.kernel.org Cc: Simon Horman , Magnus Damm , Kuninori Morimoto , Laurent Pinchart Subject: [PATCH 4/5] arm: shmobile: r8a7791: Add PCI USB host clock support Date: Fri, 20 Dec 2013 18:14:27 +0400 Message-Id: <1387548868-20943-5-git-send-email-valentine.barshak@cogentembedded.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1387548868-20943-1-git-send-email-valentine.barshak@cogentembedded.com> References: <1387548868-20943-1-git-send-email-valentine.barshak@cogentembedded.com> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This adds internal PCI USB host clock support to R-Car M2 SoC. Signed-off-by: Valentine Barshak --- arch/arm/mach-shmobile/clock-r8a7791.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c index 966a7e2..c9b72ca 100644 --- a/arch/arm/mach-shmobile/clock-r8a7791.c +++ b/arch/arm/mach-shmobile/clock-r8a7791.c @@ -125,7 +125,7 @@ enum { MSTP813, MSTP726, MSTP724, MSTP723, MSTP721, MSTP720, MSTP719, MSTP718, MSTP715, MSTP714, - MSTP704, + MSTP704, MSTP703, MSTP522, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP1105, MSTP1106, MSTP1107, @@ -145,6 +145,7 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP715] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 15, 0), /* SCIF4 */ [MSTP714] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 14, 0), /* SCIF5 */ [MSTP704] = SH_CLK_MSTP32(&mp_clk, SMSTPCR7, 4, 0), /* HSUSB */ + [MSTP703] = SH_CLK_MSTP32(&mp_clk, SMSTPCR7, 3, 0), /* EHCI */ [MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */ [MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */ [MSTP207] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 7, 0), /* SCIFB1 */ @@ -199,6 +200,8 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("r8a7791-ether", &mstp_clks[MSTP813]), /* Ether */ CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP704]), CLKDEV_ICK_ID("usbhs", "usb_phy_rcar_gen2", &mstp_clks[MSTP704]), + CLKDEV_DEV_ID("pci-rcar-gen2.0", &mstp_clks[MSTP703]), + CLKDEV_DEV_ID("pci-rcar-gen2.1", &mstp_clks[MSTP703]), }; #define R8A7791_CLOCK_ROOT(e, m, p0, p1, p30, p31) \