From patchwork Fri Jan 17 18:21:34 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Valentine Barshak X-Patchwork-Id: 3506741 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 0A523C02DC for ; Fri, 17 Jan 2014 18:21:46 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2BD39200E9 for ; Fri, 17 Jan 2014 18:21:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5555F2017B for ; Fri, 17 Jan 2014 18:21:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753119AbaAQSVo (ORCPT ); Fri, 17 Jan 2014 13:21:44 -0500 Received: from mail-la0-f54.google.com ([209.85.215.54]:34974 "EHLO mail-la0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753075AbaAQSVn (ORCPT ); Fri, 17 Jan 2014 13:21:43 -0500 Received: by mail-la0-f54.google.com with SMTP id y1so3834196lam.41 for ; Fri, 17 Jan 2014 10:21:42 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=RFzP9cUPwuwQrr/q5bUXcjFnPRyi9D9shaXKYrznyJM=; b=f0KSmPgtSZA8zAj9lyUUuHpdv02kZTLrkJoZpGGuW1LlLhFFfBo4fyQLZ/GyFt79aj gkbTS0FnG8Kokwz23jFVlTu647rr2euB342HP0dBenBnBygJhT0CAM/maC83ixlMgKOY NeChhYQyBy2qzz6G0aey89g5MvN3Cwi3e9P5Y/NbOvd5c4hyzbfFfzQNELB3cleHfgur kFieT/gOrfp2q6k5qAd19f8wx5YvrLuiAD/przd7cVSZEKwsb96AHpRpR3o2NNR4lm1X 8uszeI0cGRU5o2GetJog2jrFaXXKnFTcNAGz0ckrGx5mBi6crBNXOjeFxdQBelCZ0zeb 62kg== X-Gm-Message-State: ALoCoQmjfm0wnrxMHGiq5bBCjR/rX7EsbLrJmpZ4H0lziTs1vP54smFd8JmKQ756+ZEJYFoY0oa8 X-Received: by 10.152.25.226 with SMTP id f2mr1866632lag.14.1389982902420; Fri, 17 Jan 2014 10:21:42 -0800 (PST) Received: from black.localnet ([93.100.122.208]) by mx.google.com with ESMTPSA id qx1sm7250746lbb.15.2014.01.17.10.21.40 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 17 Jan 2014 10:21:41 -0800 (PST) From: Valentine Barshak To: linux-sh@vger.kernel.org Cc: Simon Horman , Magnus Damm , Kuninori Morimoto , Laurent Pinchart Subject: [PATCH V2 3/4] ARM: shmobile: r8a7791: Add PCI USB host clock support Date: Fri, 17 Jan 2014 22:21:34 +0400 Message-Id: <1389982895-20726-4-git-send-email-valentine.barshak@cogentembedded.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1389982895-20726-1-git-send-email-valentine.barshak@cogentembedded.com> References: <1389982895-20726-1-git-send-email-valentine.barshak@cogentembedded.com> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-7.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This adds internal PCI USB host clock support to R-Car M2 SoC. Signed-off-by: Valentine Barshak --- arch/arm/mach-shmobile/clock-r8a7791.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) Changes in V2: * capitalized ARM in the subject; * rebased on top the latest devel tag. diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c index ab1ef2e..564cd46 100644 --- a/arch/arm/mach-shmobile/clock-r8a7791.c +++ b/arch/arm/mach-shmobile/clock-r8a7791.c @@ -140,7 +140,7 @@ enum { MSTP811, MSTP810, MSTP809, MSTP726, MSTP724, MSTP723, MSTP721, MSTP720, MSTP719, MSTP718, MSTP715, MSTP714, - MSTP704, + MSTP704, MSTP703, MSTP522, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP1105, MSTP1106, MSTP1107, @@ -171,6 +171,7 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP715] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR7, 15, MSTPSR7, 0), /* SCIF4 */ [MSTP714] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR7, 14, MSTPSR7, 0), /* SCIF5 */ [MSTP704] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR7, 4, MSTPSR7, 0), /* HSUSB */ + [MSTP703] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR7, 3, MSTPSR7, 0), /* EHCI */ [MSTP522] = SH_CLK_MSTP32_STS(&extal_clk, SMSTPCR5, 22, MSTPSR5, 0), /* Thermal */ [MSTP216] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 16, MSTPSR2, 0), /* SCIFB2 */ [MSTP207] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 7, MSTPSR2, 0), /* SCIFB1 */ @@ -238,6 +239,8 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("sata-r8a7791.1", &mstp_clks[MSTP814]), CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP704]), CLKDEV_ICK_ID("usbhs", "usb_phy_rcar_gen2", &mstp_clks[MSTP704]), + CLKDEV_DEV_ID("pci-rcar-gen2.0", &mstp_clks[MSTP703]), + CLKDEV_DEV_ID("pci-rcar-gen2.1", &mstp_clks[MSTP703]), }; #define R8A7791_CLOCK_ROOT(e, m, p0, p1, p30, p31) \