From patchwork Tue Feb 4 18:17:37 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Towle X-Patchwork-Id: 3585211 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id C80599F2E9 for ; Wed, 5 Feb 2014 08:53:00 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 11D8320170 for ; Wed, 5 Feb 2014 08:53:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3475B20163 for ; Wed, 5 Feb 2014 08:52:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751049AbaBEIw7 (ORCPT ); Wed, 5 Feb 2014 03:52:59 -0500 Received: from 82-68-191-81.dsl.posilan.com ([82.68.191.81]:49535 "EHLO xk120" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1750968AbaBEIw6 (ORCPT ); Wed, 5 Feb 2014 03:52:58 -0500 Received: from william by xk120 with local (Exim 4.80) (envelope-from ) id 1WAkZ2-0007Rx-SS; Tue, 04 Feb 2014 18:17:40 +0000 From: William Towle To: linux-kernel@lists.codethink.co.uk, linux-arm-kernel@lists.infradead.org, linux-sh@vger.kernel.org, laurent.pinchart+renesas@ideasonboard.com, horms+renesas@verge.net.au, magnus.damm@gmail.com, mturquette@linaro.org Cc: William Towle Subject: [PATCH 2/3] ARM: shmobile: r8a7790: specify multiple parents for cpg_clks Date: Tue, 4 Feb 2014 18:17:37 +0000 Message-Id: <1391537858-28593-3-git-send-email-william.towle@codethink.co.uk> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1391537858-28593-1-git-send-email-william.towle@codethink.co.uk> References: <1391537858-28593-1-git-send-email-william.towle@codethink.co.uk> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The current drivers/clk/shmobile/clk-rcar-gen2.c uses the extal_clk reference for the parent of all the clocks that it registers. However the lb, qspi, sdh, sd0 and sd1 clocks are all parented to either pll1 or pll1_div2 which means that the clock rates are incorrect. This is part of the fix that corrects the SDHI0 clock rate error where it reports 1MHz instead of 97.5: sh_mobile_sdhi ee100000.sd: mmc0 base at 0xee100000 clock rate 1 MHz Notes: - May require cross-merge with clk-rcar-gen2.c fix - Also not clear which clock "z" is to fix it. [ben.dooks@codethink.co.uk: updated patch description] Signed-off-by: William Towle Reviewed-by: Ben Dooks --- arch/arm/boot/dts/r8a7790.dtsi | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index ff55c6e..242e6e2 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -446,7 +446,13 @@ compatible = "renesas,r8a7790-cpg-clocks", "renesas,rcar-gen2-cpg-clocks"; reg = <0 0xe6150000 0 0x1000>; - clocks = <&extal_clk>; + clocks = <&extal_clk>, <&extal_clk>, <&extal_clk>, <&extal_clk>, + <&cpg_clocks R8A7790_CLK_PLL1>, + <&pll1_div2_clk>, + <&cpg_clocks R8A7790_CLK_PLL1>, + <&cpg_clocks R8A7790_CLK_PLL1>, + <&cpg_clocks R8A7790_CLK_PLL1> + /* not known for "z" ...,<> */; #clock-cells = <1>; clock-output-names = "main", "pll0", "pll1", "pll3", "lb", "qspi", "sdh", "sd0", "sd1",