From patchwork Thu Feb 20 14:49:33 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 3687651 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 321C49F2EC for ; Thu, 20 Feb 2014 14:49:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3CB8F20155 for ; Thu, 20 Feb 2014 14:49:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7AC1920142 for ; Thu, 20 Feb 2014 14:49:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754705AbaBTOtz (ORCPT ); Thu, 20 Feb 2014 09:49:55 -0500 Received: from albert.telenet-ops.be ([195.130.137.90]:53977 "EHLO albert.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752293AbaBTOtx (ORCPT ); Thu, 20 Feb 2014 09:49:53 -0500 Received: from ayla.of.borg ([84.193.72.141]) by albert.telenet-ops.be with bizsmtp id Uepp1n01232ts5g06eppYF; Thu, 20 Feb 2014 15:49:52 +0100 Received: from geert by ayla.of.borg with local (Exim 4.76) (envelope-from ) id 1WGUwf-0005ko-Jv; Thu, 20 Feb 2014 15:49:49 +0100 From: Geert Uytterhoeven To: Simon Horman , Magnus Damm Cc: linux-sh@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH 05/11] ARM: shmobile: koelsch legacy: Add MSIOF support Date: Thu, 20 Feb 2014 15:49:33 +0100 Message-Id: <1392907779-22053-6-git-send-email-geert@linux-m68k.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1392907779-22053-1-git-send-email-geert@linux-m68k.org> References: <1392907779-22053-1-git-send-email-geert@linux-m68k.org> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Geert Uytterhoeven Add MSIOF resources, platform data, platform device, pinctrl, and SPI child device. - Platform device numbering is 1-based for compatibility with the BSP, as QSPI uses zero. - Only MSIOF0 is in use, and thus registered. Its bus contains a single device (a Renesas R2A11302FT PMIC). Based on patches from Takashi Yoshii Signed-off-by: Geert Uytterhoeven --- arch/arm/mach-shmobile/board-koelsch.c | 59 ++++++++++++++++++++++++++++---- 1 file changed, 53 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c index 5a034ff405d0..47bf588fc5ce 100644 --- a/arch/arm/mach-shmobile/board-koelsch.c +++ b/arch/arm/mach-shmobile/board-koelsch.c @@ -44,6 +44,7 @@ #include #include #include +#include #include #include #include @@ -184,6 +185,35 @@ static const struct rspi_plat_data qspi_pdata __initconst = { .num_chipselect = 1, }; +/* MSIOF */ +static const struct resource sh_msiof0_resources[] __initconst = { + DEFINE_RES_MEM(0xe6e20000, 0x0064), + DEFINE_RES_IRQ(gic_spi(156)), +}; + +static const struct resource sh_msiof1_resources[] __initconst = { + DEFINE_RES_MEM(0xe6e10000, 0x0064), + DEFINE_RES_IRQ(gic_spi(157)), +}; + +static const struct resource sh_msiof2_resources[] __initconst = { + DEFINE_RES_MEM(0xe6e00000, 0x0064), + DEFINE_RES_IRQ(gic_spi(158)), +}; + +static const struct sh_msiof_spi_info sh_msiof_info __initconst = { + .rx_fifo_override = 256, + .num_chipselect = 1, +}; + +#define r8a7791_register_msiof(idx) \ + platform_device_register_resndata(&platform_bus, \ + "spi_r8a7791_msiof", \ + (idx+1), sh_msiof##idx##_resources, \ + ARRAY_SIZE(sh_msiof##idx##_resources), \ + &sh_msiof_info, \ + sizeof(struct sh_msiof_spi_info)) + /* SPI Flash memory (Spansion S25FL512SAGMFIG11 64 MiB) */ static struct mtd_partition spi_flash_part[] = { { @@ -214,12 +244,19 @@ static const struct flash_platform_data spi_flash_data = { static const struct spi_board_info spi_info[] __initconst = { { - .modalias = "m25p80", - .platform_data = &spi_flash_data, - .mode = SPI_MODE_0, - .max_speed_hz = 30000000, - .bus_num = 0, - .chip_select = 0, + .modalias = "m25p80", + .platform_data = &spi_flash_data, + .mode = SPI_MODE_0, + .max_speed_hz = 30000000, + .bus_num = 0, + .chip_select = 0, + }, { + .modalias = "r2a1130x", + .max_speed_hz = 6000000, + .chip_select = 0, + .bus_num = 1, + .mode = SPI_MODE_3, + .controller_data = (void *)-ENOENT, /* HW controlled CS */ }, }; @@ -384,6 +421,15 @@ static const struct pinctrl_map koelsch_pinctrl_map[] = { "eth_rmii", "eth"), PIN_MAP_MUX_GROUP_DEFAULT("r8a7791-ether", "pfc-r8a7791", "intc_irq0", "intc"), + /* MSIOF0 */ + PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7791_msiof.1", "pfc-r8a7791", + "msiof0_clk", "msiof0"), + PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7791_msiof.1", "pfc-r8a7791", + "msiof0_sync", "msiof0"), + PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7791_msiof.1", "pfc-r8a7791", + "msiof0_rx", "msiof0"), + PIN_MAP_MUX_GROUP_DEFAULT("spi_r8a7791_msiof.1", "pfc-r8a7791", + "msiof0_tx", "msiof0"), /* QSPI */ PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7791", "qspi_ctrl", "qspi"), @@ -449,6 +495,7 @@ static void __init koelsch_add_standard_devices(void) qspi_resources, ARRAY_SIZE(qspi_resources), &qspi_pdata, sizeof(qspi_pdata)); + r8a7791_register_msiof(0); spi_register_board_info(spi_info, ARRAY_SIZE(spi_info)); koelsch_add_du_device();