From patchwork Fri Aug 8 14:23:11 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulrich Hecht X-Patchwork-Id: 4696541 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 0600FC0338 for ; Fri, 8 Aug 2014 14:23:40 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1194D20160 for ; Fri, 8 Aug 2014 14:23:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 26B1E2010E for ; Fri, 8 Aug 2014 14:23:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752663AbaHHOXg (ORCPT ); Fri, 8 Aug 2014 10:23:36 -0400 Received: from mail-wi0-f180.google.com ([209.85.212.180]:53423 "EHLO mail-wi0-f180.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752704AbaHHOXa (ORCPT ); Fri, 8 Aug 2014 10:23:30 -0400 Received: by mail-wi0-f180.google.com with SMTP id n3so1105144wiv.1 for ; Fri, 08 Aug 2014 07:23:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=/TGTF8qVHu3XbFp6UqFqIdsNFSFY7TPSgV8iQfJAJrs=; b=wjKeaCzqsI6lzLeW4yBw7Qwda0Er2gFkdqpaqg9Uprh/+pC3DghGkEjjmpL/6ZVfx5 8JpJ74k64SOvwKzMQPM88Ts0bQsklFRuKMYmbswbifM1EhceR7MLrd2RuSShKs2pjRd5 iE9z5dyme34uCIFOqdAqP2R+NVJ3uuFFpkurtH9YNkMOKYgeuHcuWhVfUR25/gjb63Kq z/ZsQvQoGhGdZAXyrpbL7pYuUoRuUACbWtq2mDi1QJyxuuVjuHHDTJ3ppX+s9+e1WlwP Q0AkdA2EF0O/UGV07ShNoRWW6thlOMwIaXYBTptv1Z4wlJzJac0R+3xb19eNJsGRt1tL 5hRg== X-Received: by 10.180.212.12 with SMTP id ng12mr4690317wic.9.1407507809051; Fri, 08 Aug 2014 07:23:29 -0700 (PDT) Received: from groucho.site ([46.166.186.233]) by mx.google.com with ESMTPSA id o2sm7597448wij.24.2014.08.08.07.23.27 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 08 Aug 2014 07:23:28 -0700 (PDT) From: Ulrich Hecht To: horms@verge.net.au Cc: linux-sh@vger.kernel.org, mturquette@linaro.org, devicetree@vger.kernel.org, magnus.damm@gmail.com, Ulrich Hecht Subject: [PATCH v2 4/5] ARM: shmobile: r8a7740: add MSTP clock assignments to DT Date: Fri, 8 Aug 2014 16:23:11 +0200 Message-Id: <1407507792-8121-5-git-send-email-ulrich.hecht+renesas@gmail.com> X-Mailer: git-send-email 1.8.4.5 In-Reply-To: <1407507792-8121-1-git-send-email-ulrich.hecht+renesas@gmail.com> References: <1407507792-8121-1-git-send-email-ulrich.hecht+renesas@gmail.com> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Assigns clocks to ether, i2c*, scif*, tpu, mmcif0, sdhi*, and fsi2. Signed-off-by: Ulrich Hecht --- arch/arm/boot/dts/r8a7740.dtsi | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi index 3c61c5d..6cd6a46 100644 --- a/arch/arm/boot/dts/r8a7740.dtsi +++ b/arch/arm/boot/dts/r8a7740.dtsi @@ -126,7 +126,7 @@ reg = <0xe9a00000 0x800>, <0xe9a01800 0x800>; interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>; - /* clocks = <&mstp3_clks R8A7740_CLK_GETHER>; */ + clocks = <&mstp3_clks R8A7740_CLK_GETHER>; phy-mode = "mii"; #address-cells = <1>; #size-cells = <0>; @@ -142,6 +142,7 @@ 0 202 IRQ_TYPE_LEVEL_HIGH 0 203 IRQ_TYPE_LEVEL_HIGH 0 204 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp1_clks R8A7740_CLK_IIC0>; status = "disabled"; }; @@ -154,6 +155,7 @@ 0 71 IRQ_TYPE_LEVEL_HIGH 0 72 IRQ_TYPE_LEVEL_HIGH 0 73 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7740_CLK_IIC1>; status = "disabled"; }; @@ -161,6 +163,8 @@ compatible = "renesas,scifa-r8a7740", "renesas,scifa"; reg = <0xe6c40000 0x100>; interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp2_clks R8A7740_CLK_SCIFA0>; + clock-names = "sci_ick"; status = "disabled"; }; @@ -168,6 +172,8 @@ compatible = "renesas,scifa-r8a7740", "renesas,scifa"; reg = <0xe6c50000 0x100>; interrupts = <0 101 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp2_clks R8A7740_CLK_SCIFA1>; + clock-names = "sci_ick"; status = "disabled"; }; @@ -175,6 +181,8 @@ compatible = "renesas,scifa-r8a7740", "renesas,scifa"; reg = <0xe6c60000 0x100>; interrupts = <0 102 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp2_clks R8A7740_CLK_SCIFA0>; + clock-names = "sci_ick"; status = "disabled"; }; @@ -182,6 +190,8 @@ compatible = "renesas,scifa-r8a7740", "renesas,scifa"; reg = <0xe6c70000 0x100>; interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp2_clks R8A7740_CLK_SCIFA3>; + clock-names = "sci_ick"; status = "disabled"; }; @@ -189,6 +199,8 @@ compatible = "renesas,scifa-r8a7740", "renesas,scifa"; reg = <0xe6c80000 0x100>; interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp2_clks R8A7740_CLK_SCIFA4>; + clock-names = "sci_ick"; status = "disabled"; }; @@ -196,6 +208,8 @@ compatible = "renesas,scifa-r8a7740", "renesas,scifa"; reg = <0xe6cb0000 0x100>; interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp2_clks R8A7740_CLK_SCIFA5>; + clock-names = "sci_ick"; status = "disabled"; }; @@ -203,6 +217,8 @@ compatible = "renesas,scifa-r8a7740", "renesas,scifa"; reg = <0xe6cc0000 0x100>; interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp2_clks R8A7740_CLK_SCIFA6>; + clock-names = "sci_ick"; status = "disabled"; }; @@ -210,6 +226,8 @@ compatible = "renesas,scifa-r8a7740", "renesas,scifa"; reg = <0xe6cd0000 0x100>; interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp2_clks R8A7740_CLK_SCIFA7>; + clock-names = "sci_ick"; status = "disabled"; }; @@ -217,6 +235,8 @@ compatible = "renesas,scifb-r8a7740", "renesas,scifb"; reg = <0xe6c30000 0x100>; interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp2_clks R8A7740_CLK_SCIFB>; + clock-names = "sci_ick"; status = "disabled"; }; @@ -240,6 +260,7 @@ tpu: pwm@e6600000 { compatible = "renesas,tpu-r8a7740", "renesas,tpu"; reg = <0xe6600000 0x100>; + clocks = <&mstp3_clks R8A7740_CLK_TPU0>; status = "disabled"; #pwm-cells = <3>; }; @@ -249,6 +270,7 @@ reg = <0xe6bd0000 0x100>; interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH 0 57 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7740_CLK_MMC>; status = "disabled"; }; @@ -258,6 +280,7 @@ interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH 0 118 IRQ_TYPE_LEVEL_HIGH 0 119 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7740_CLK_SDHI0>; cap-sd-highspeed; cap-sdio-irq; status = "disabled"; @@ -269,6 +292,7 @@ interrupts = <0 121 IRQ_TYPE_LEVEL_HIGH 0 122 IRQ_TYPE_LEVEL_HIGH 0 123 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7740_CLK_SDHI1>; cap-sd-highspeed; cap-sdio-irq; status = "disabled"; @@ -280,6 +304,7 @@ interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH 0 126 IRQ_TYPE_LEVEL_HIGH 0 127 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp4_clks R8A7740_CLK_SDHI2>; cap-sd-highspeed; cap-sdio-irq; status = "disabled"; @@ -290,6 +315,7 @@ compatible = "renesas,fsi2-r8a7740", "renesas,sh_fsi2"; reg = <0xfe1f0000 0x400>; interrupts = <0 9 0x4>; + clocks = <&mstp3_clks R8A7740_CLK_FSI>; status = "disabled"; };