From patchwork Thu Nov 6 16:50:37 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulrich Hecht X-Patchwork-Id: 5245571 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E2244C11AC for ; Thu, 6 Nov 2014 16:51:03 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0AC06200F3 for ; Thu, 6 Nov 2014 16:51:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 29713200F2 for ; Thu, 6 Nov 2014 16:51:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752422AbaKFQvA (ORCPT ); Thu, 6 Nov 2014 11:51:00 -0500 Received: from mail-wi0-f173.google.com ([209.85.212.173]:33946 "EHLO mail-wi0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752315AbaKFQu6 (ORCPT ); Thu, 6 Nov 2014 11:50:58 -0500 Received: by mail-wi0-f173.google.com with SMTP id n3so2085202wiv.12 for ; Thu, 06 Nov 2014 08:50:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=ncbbaqj9K5cQr1/V6czNL0+1ZBkbwFKVZRv2NhckPHI=; b=UdyRETRzAwJBA6oxm2AylnDvEqbyasqTyF2onOUcTTEd6Bxe7rzX9Fq5Wps66FGAUx Zanal4UWTlnaQv6ktcrCfKCOWiXYQqkEQ8cuKU0p2ew/PpUSZ/kR3TRxIEyKu2w+R1kw wgj3i2jGit0edofjVipM0Hn8oeUeGdWqwn0KLZoQYPLfq/8z04AKO2Byc2mvZJkxHKZr ecdx9uTXEctKnl0MgKKWHmYna2hvWCYx3SO0Ts8CK2uQ2BtzVtYHL6lvH/x4Jc4TkE+V NW6bXMHmEhw/8IpX2MFcYuIJUU9wI8eaJaERxlZ12pc9DJtXd695RqjL7SL1CdcJ+2+i W7wg== X-Received: by 10.180.21.163 with SMTP id w3mr43004098wie.48.1415292657409; Thu, 06 Nov 2014 08:50:57 -0800 (PST) Received: from groucho.site (ipbcc2fb1c.dynamic.kabel-deutschland.de. [188.194.251.28]) by mx.google.com with ESMTPSA id rx8sm8471509wjb.30.2014.11.06.08.50.55 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 06 Nov 2014 08:50:56 -0800 (PST) From: Ulrich Hecht To: horms@verge.net.au, geert@linux-m68k.org, laurent.pinchart+renesas@ideasonboard.com Cc: mturquette@linaro.org, linux-sh@vger.kernel.org, magnus.damm@gmail.com, Ulrich Hecht Subject: [PATCH v4 2/6] ARM: shmobile: sh73a0: Add CPG register bits header Date: Thu, 6 Nov 2014 17:50:37 +0100 Message-Id: <1415292641-30331-3-git-send-email-ulrich.hecht+renesas@gmail.com> X-Mailer: git-send-email 1.8.4.5 In-Reply-To: <1415292641-30331-1-git-send-email-ulrich.hecht+renesas@gmail.com> References: <1415292641-30331-1-git-send-email-ulrich.hecht+renesas@gmail.com> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Ulrich Hecht Acked-by: Laurent Pinchart --- include/dt-bindings/clock/sh73a0-clock.h | 79 ++++++++++++++++++++++++++++++++ 1 file changed, 79 insertions(+) create mode 100644 include/dt-bindings/clock/sh73a0-clock.h diff --git a/include/dt-bindings/clock/sh73a0-clock.h b/include/dt-bindings/clock/sh73a0-clock.h new file mode 100644 index 0000000..1dd3eb2 --- /dev/null +++ b/include/dt-bindings/clock/sh73a0-clock.h @@ -0,0 +1,79 @@ +/* + * Copyright 2014 Ulrich Hecht + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __DT_BINDINGS_CLOCK_SH73A0_H__ +#define __DT_BINDINGS_CLOCK_SH73A0_H__ + +/* CPG */ +#define SH73A0_CLK_MAIN 0 +#define SH73A0_CLK_PLL0 1 +#define SH73A0_CLK_PLL1 2 +#define SH73A0_CLK_PLL2 3 +#define SH73A0_CLK_PLL3 4 +#define SH73A0_CLK_DSI0PHY 5 +#define SH73A0_CLK_DSI1PHY 6 +#define SH73A0_CLK_ZG 7 +#define SH73A0_CLK_M3 8 +#define SH73A0_CLK_B 9 +#define SH73A0_CLK_M1 10 +#define SH73A0_CLK_M2 11 +#define SH73A0_CLK_Z 12 +#define SH73A0_CLK_ZX 13 +#define SH73A0_CLK_HP 14 + +/* MSTP0 */ +#define SH73A0_CLK_IIC2 1 + +/* MSTP1 */ +#define SH73A0_CLK_CEU1 29 +#define SH73A0_CLK_CSI2_RX1 28 +#define SH73A0_CLK_CEU0 27 +#define SH73A0_CLK_CSI2_RX0 26 +#define SH73A0_CLK_TMU0 25 +#define SH73A0_CLK_DSITX0 18 +#define SH73A0_CLK_IIC0 16 +#define SH73A0_CLK_SGX 12 +#define SH73A0_CLK_LCDC0 0 + +/* MSTP2 */ +#define SH73A0_CLK_SCIFA7 19 +#define SH73A0_CLK_SY_DMAC 18 +#define SH73A0_CLK_MP_DMAC 17 +#define SH73A0_CLK_SCIFA5 7 +#define SH73A0_CLK_SCIFB 6 +#define SH73A0_CLK_SCIFA0 4 +#define SH73A0_CLK_SCIFA1 3 +#define SH73A0_CLK_SCIFA2 2 +#define SH73A0_CLK_SCIFA3 1 +#define SH73A0_CLK_SCIFA4 0 + +/* MSTP3 */ +#define SH73A0_CLK_SCIFA6 31 +#define SH73A0_CLK_CMT1 29 +#define SH73A0_CLK_FSI 28 +#define SH73A0_CLK_IRDA 25 +#define SH73A0_CLK_IIC1 23 +#define SH73A0_CLK_USB 22 +#define SH73A0_CLK_FLCTL 15 +#define SH73A0_CLK_SDHI0 14 +#define SH73A0_CLK_SDHI1 13 +#define SH73A0_CLK_MMCIF0 12 +#define SH73A0_CLK_SDHI2 11 +#define SH73A0_CLK_TPU0 4 +#define SH73A0_CLK_TPU1 3 +#define SH73A0_CLK_TPU2 2 +#define SH73A0_CLK_TPU3 1 +#define SH73A0_CLK_TPU4 0 + +/* MSTP4 */ +#define SH73A0_CLK_IIC3 11 +#define SH73A0_CLK_IIC4 10 +#define SH73A0_CLK_KEYSC 3 + +#endif