diff mbox

[1/2] gpio: pcf857x: Propagate wake-up setting to parent irq controller

Message ID 1418218575-17694-1-git-send-email-geert+renesas@glider.be (mailing list archive)
State Changes Requested
Delegated to: Geert Uytterhoeven
Headers show

Commit Message

Geert Uytterhoeven Dec. 10, 2014, 1:36 p.m. UTC
The pcf857x GPIO and interrupt controller uses dummy_irq_chip, which
does not implement irq_chip.irq_set_wake() and does not set
IRQCHIP_SKIP_SET_WAKE.

This causes two s2ram issues if wake-up is enabled for the pcf857x GPIO
pins:
  1. During resume from s2ram, the following warning is printed:

     WARNING: CPU: 0 PID: 1046 at kernel/irq/manage.c:537 irq_set_irq_wake+0x9c/0xf8()
     Unbalanced IRQ 113 wake disable

  2. Wake-up through the pcf857x GPIO pins may fail, as the parent
     interrupt controller may be suspended.

Migrate the pcf857x GPIO and interrupt controller from dummy_irq_chip to
its own irq_chip. This irq chip implements irq_chip.irq_set_wake() to
propagate its wake-up setting to the parent interrupt controller.

This fixes wake-up through gpio-keys on sh73a0/kzm9g, where the pcf857x
interrupt is cascaded to irq-renesas-intc-irqpin, and the latter must
not be suspended when wake-up is enabled.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/gpio/gpio-pcf857x.c | 33 ++++++++++++++++++++++++++++++++-
 1 file changed, 32 insertions(+), 1 deletion(-)

Comments

Alexandre Courbot Dec. 17, 2014, 6:01 a.m. UTC | #1
On Wed, Dec 10, 2014 at 10:36 PM, Geert Uytterhoeven
<geert+renesas@glider.be> wrote:
> The pcf857x GPIO and interrupt controller uses dummy_irq_chip, which
> does not implement irq_chip.irq_set_wake() and does not set
> IRQCHIP_SKIP_SET_WAKE.
>
> This causes two s2ram issues if wake-up is enabled for the pcf857x GPIO
> pins:
>   1. During resume from s2ram, the following warning is printed:
>
>      WARNING: CPU: 0 PID: 1046 at kernel/irq/manage.c:537 irq_set_irq_wake+0x9c/0xf8()
>      Unbalanced IRQ 113 wake disable
>
>   2. Wake-up through the pcf857x GPIO pins may fail, as the parent
>      interrupt controller may be suspended.
>
> Migrate the pcf857x GPIO and interrupt controller from dummy_irq_chip to
> its own irq_chip. This irq chip implements irq_chip.irq_set_wake() to
> propagate its wake-up setting to the parent interrupt controller.
>
> This fixes wake-up through gpio-keys on sh73a0/kzm9g, where the pcf857x
> interrupt is cascaded to irq-renesas-intc-irqpin, and the latter must
> not be suspended when wake-up is enabled.

I am not very familiar with the IRQ subsystem, but wouldn't it be
possible (and better) to try and fix/adapt dummy_irq_chip so it
displays the right behavior? At least your first point looks like an
issue with it.
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Geert Uytterhoeven Dec. 17, 2014, 8:13 a.m. UTC | #2
Hi Alexandre,

On Wed, Dec 17, 2014 at 7:01 AM, Alexandre Courbot <gnurou@gmail.com> wrote:
> On Wed, Dec 10, 2014 at 10:36 PM, Geert Uytterhoeven
> <geert+renesas@glider.be> wrote:
>> The pcf857x GPIO and interrupt controller uses dummy_irq_chip, which
>> does not implement irq_chip.irq_set_wake() and does not set
>> IRQCHIP_SKIP_SET_WAKE.
>>
>> This causes two s2ram issues if wake-up is enabled for the pcf857x GPIO
>> pins:
>>   1. During resume from s2ram, the following warning is printed:
>>
>>      WARNING: CPU: 0 PID: 1046 at kernel/irq/manage.c:537 irq_set_irq_wake+0x9c/0xf8()
>>      Unbalanced IRQ 113 wake disable
>>
>>   2. Wake-up through the pcf857x GPIO pins may fail, as the parent
>>      interrupt controller may be suspended.
>>
>> Migrate the pcf857x GPIO and interrupt controller from dummy_irq_chip to
>> its own irq_chip. This irq chip implements irq_chip.irq_set_wake() to
>> propagate its wake-up setting to the parent interrupt controller.
>>
>> This fixes wake-up through gpio-keys on sh73a0/kzm9g, where the pcf857x
>> interrupt is cascaded to irq-renesas-intc-irqpin, and the latter must
>> not be suspended when wake-up is enabled.
>
> I am not very familiar with the IRQ subsystem, but wouldn't it be
> possible (and better) to try and fix/adapt dummy_irq_chip so it
> displays the right behavior? At least your first point looks like an
> issue with it.

I fixed dummy_irq_chip in the second patch of the series ("[PATCH 2/2] [RFC]
genirq: Set IRQCHIP_SKIP_SET_WAKE for no_irq_chip and dummy_irq_chip:).
But please note that that would fix the warning (issue 1) only.

Pcf857x still needs to propagate the wake-up setting to the parent interrupt
controller to avoid the parent from being suspended if wake-up is enabled
(issue 2). That cannot be done in dummy_irq_chip, as dummy_irq_chip doesn't
know it is cascaded to a parent interrupt controller, nor about the interrupt
number that is used for the cascade. That information is specific to the child
driver.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
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Linus Walleij Jan. 13, 2015, 2:26 p.m. UTC | #3
On Wed, Dec 10, 2014 at 2:36 PM, Geert Uytterhoeven
<geert+renesas@glider.be> wrote:

> The pcf857x GPIO and interrupt controller uses dummy_irq_chip, which
> does not implement irq_chip.irq_set_wake() and does not set
> IRQCHIP_SKIP_SET_WAKE.
>
> This causes two s2ram issues if wake-up is enabled for the pcf857x GPIO
> pins:
>   1. During resume from s2ram, the following warning is printed:
>
>      WARNING: CPU: 0 PID: 1046 at kernel/irq/manage.c:537 irq_set_irq_wake+0x9c/0xf8()
>      Unbalanced IRQ 113 wake disable
>
>   2. Wake-up through the pcf857x GPIO pins may fail, as the parent
>      interrupt controller may be suspended.
>
> Migrate the pcf857x GPIO and interrupt controller from dummy_irq_chip to
> its own irq_chip. This irq chip implements irq_chip.irq_set_wake() to
> propagate its wake-up setting to the parent interrupt controller.
>
> This fixes wake-up through gpio-keys on sh73a0/kzm9g, where the pcf857x
> interrupt is cascaded to irq-renesas-intc-irqpin, and the latter must
> not be suspended when wake-up is enabled.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
(...)
> +static struct irq_chip pcf857x_irq_chip = {
> +       .name           = "pcf857x",
> +       .irq_startup    = noop_ret,
> +       .irq_shutdown   = noop,
> +       .irq_enable     = noop,
> +       .irq_disable    = noop,
> +       .irq_ack        = noop,
> +       .irq_mask       = noop,
> +       .irq_unmask     = noop,
> +       .irq_set_wake   = pcf857x_irq_set_wake,
> +};

Argh this is so simplistic ... any GPIO irqchip worthy of it's name
shoult at least call gpiochip_lock_as_irq() in .irq_request_resources() and vice
versa mutatis mutandis in .irq_release_resources().

Isn't it possible to also migrate this to GPIOLIB_IRQCHIP when
you're at it can also cut out a big chunk of rusty code?

Yours,
Linus Walleij
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diff mbox

Patch

diff --git a/drivers/gpio/gpio-pcf857x.c b/drivers/gpio/gpio-pcf857x.c
index 236708ad0a5ba0ab..22dbecb004cf6c5b 100644
--- a/drivers/gpio/gpio-pcf857x.c
+++ b/drivers/gpio/gpio-pcf857x.c
@@ -218,14 +218,45 @@  static irqreturn_t pcf857x_irq(int irq, void *data)
 	return IRQ_HANDLED;
 }
 
+/*
+ * NOP functions
+ */
+static void noop(struct irq_data *data) { }
+
+static unsigned int noop_ret(struct irq_data *data)
+{
+	return 0;
+}
+
+static int pcf857x_irq_set_wake(struct irq_data *data, unsigned int on)
+{
+	struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
+
+	irq_set_irq_wake(gpio->client->irq, on);
+	return 0;
+}
+
+static struct irq_chip pcf857x_irq_chip = {
+	.name		= "pcf857x",
+	.irq_startup	= noop_ret,
+	.irq_shutdown	= noop,
+	.irq_enable	= noop,
+	.irq_disable	= noop,
+	.irq_ack	= noop,
+	.irq_mask	= noop,
+	.irq_unmask	= noop,
+	.irq_set_wake	= pcf857x_irq_set_wake,
+};
+
 static int pcf857x_irq_domain_map(struct irq_domain *domain, unsigned int irq,
 				 irq_hw_number_t hw)
 {
 	struct pcf857x *gpio = domain->host_data;
 
 	irq_set_chip_and_handler(irq,
-				 &dummy_irq_chip,
+				 &pcf857x_irq_chip,
 				 handle_level_irq);
+	irq_set_chip_data(irq, gpio);
 #ifdef CONFIG_ARM
 	set_irq_flags(irq, IRQF_VALID);
 #else