From patchwork Fri Dec 12 03:43:33 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 5478851 X-Patchwork-Delegate: horms@verge.net.au Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 95104BEEA8 for ; Fri, 12 Dec 2014 03:43:43 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BA493201F2 for ; Fri, 12 Dec 2014 03:43:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B94CB201EF for ; Fri, 12 Dec 2014 03:43:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934005AbaLLDnl (ORCPT ); Thu, 11 Dec 2014 22:43:41 -0500 Received: from kirsty.vergenet.net ([202.4.237.240]:44535 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934004AbaLLDnk (ORCPT ); Thu, 11 Dec 2014 22:43:40 -0500 Received: from ayumi.isobedori.kobe.vergenet.net (p4076-ipbfp703kobeminato.hyogo.ocn.ne.jp [122.20.17.76]) by kirsty.vergenet.net (Postfix) with ESMTP id B7D0E25BDCC; Fri, 12 Dec 2014 14:43:38 +1100 (EST) Received: by ayumi.isobedori.kobe.vergenet.net (Postfix, from userid 7100) id 565B8EDE5CC; Fri, 12 Dec 2014 12:43:37 +0900 (JST) From: Simon Horman To: linux-sh@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Magnus Damm Subject: [PATCH v2] ARM: shmobile: r8a7794: Add SDHI clocks to device tree Date: Fri, 12 Dec 2014 12:43:33 +0900 Message-Id: <1418355813-16577-1-git-send-email-horms+renesas@verge.net.au> X-Mailer: git-send-email 2.1.3 Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Shinobu Uehara Signed-off-by: Shinobu Uehara [horms: omitted device nodes; only add clock] Signed-off-by: Simon Horman --- Based on the renesas-devel-20141212-v3.18 tag of my renesas tree v2 [Simon Horman] * As suggested by Magnus Damm - Added missing sdhi0 portions (this was an error on my part when rebasing Uehara-san's patch) v1 [Simon Horman] * Removed portions of patch which add device nodes * Renamed patch from "ARM: shmobile: r8a7794: Add SDHI clocks and devices to device tree" to "ARM: shmobile: r8a7794: Add SDHI clocks to device tree" --- arch/arm/boot/dts/r8a7794.dtsi | 20 +++++++++++++++++++- include/dt-bindings/clock/r8a7794-clock.h | 3 +++ 2 files changed, 22 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 068ca09..8794df8 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -293,6 +293,21 @@ clock-output-names = "main", "pll0", "pll1", "pll3", "lb", "qspi", "sdh", "sd0", "z"; }; + /* Variable factor clocks */ + sd1_clk: sd2_clk@e6150078 { + compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock"; + reg = <0 0xe6150078 0 4>; + clocks = <&pll1_div2_clk>; + #clock-cells = <0>; + clock-output-names = "sd1"; + }; + sd2_clk: sd3_clk@e615007c { + compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock"; + reg = <0 0xe615007c 0 4>; + clocks = <&pll1_div2_clk>; + #clock-cells = <0>; + clock-output-names = "sd2"; + }; /* Fixed factor clocks */ pll1_div2_clk: pll1_div2_clk { @@ -496,13 +511,16 @@ mstp3_clks: mstp3_clks@e615013c { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; - clocks = <&rclk_clk>, <&hp_clk>, <&hp_clk>; + clocks = <&sd2_clk>, <&sd1_clk>, <&cpg_clocks R8A7794_CLK_SD0>, + <&rclk_clk>, <&hp_clk>, <&hp_clk>; #clock-cells = <1>; clock-indices = < + R8A7794_CLK_SDHI2 R8A7794_CLK_SDHI1 R8A7794_CLK_SDHI0 R8A7794_CLK_CMT1 R8A7794_CLK_USBDMAC0 R8A7794_CLK_USBDMAC1 >; clock-output-names = + "sdhi2", "sdhi1", "sdhi0", "cmt1", "usbdmac0", "usbdmac1"; }; mstp7_clks: mstp7_clks@e615014c { diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h index fba89a4..f013cdc 100644 --- a/include/dt-bindings/clock/r8a7794-clock.h +++ b/include/dt-bindings/clock/r8a7794-clock.h @@ -52,6 +52,9 @@ #define R8A7794_CLK_SYS_DMAC0 19 /* MSTP3 */ +#define R8A7794_CLK_SDHI2 11 +#define R8A7794_CLK_SDHI1 12 +#define R8A7794_CLK_SDHI0 14 #define R8A7794_CLK_CMT1 29 #define R8A7794_CLK_USBDMAC0 30 #define R8A7794_CLK_USBDMAC1 31