diff mbox

[v2,2/2] ARM: shmobile: r8a7790: Correct mask for GIC PPI interrupts

Message ID 1421329844-19707-3-git-send-email-geert+renesas@glider.be (mailing list archive)
State Deferred
Delegated to: Simon Horman
Headers show

Commit Message

Geert Uytterhoeven Jan. 15, 2015, 1:50 p.m. UTC
R-Car H2 (r8a7790) contains four Cortex-A15 and four Cortex-A7 cores,
hence the second interrupt specifier cell for Private Peripheral
Interrupts should use "GIC_CPU_MASK_SIMPLE(8)", to make sure interrupts
can be delivered to all 8 processor cores.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Untested

v2:
  - Drop RFC status after receiving confirmation from Liviu Dudau.
---
 arch/arm/boot/dts/r8a7790.dtsi | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

Comments

Magnus Damm Jan. 16, 2015, 1:49 a.m. UTC | #1
Hi Geert,

On Thu, Jan 15, 2015 at 10:50 PM, Geert Uytterhoeven
<geert+renesas@glider.be> wrote:
> R-Car H2 (r8a7790) contains four Cortex-A15 and four Cortex-A7 cores,
> hence the second interrupt specifier cell for Private Peripheral
> Interrupts should use "GIC_CPU_MASK_SIMPLE(8)", to make sure interrupts
> can be delivered to all 8 processor cores.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> Untested
>
> v2:
>   - Drop RFC status after receiving confirmation from Liviu Dudau.

Thanks for your work on this.

I see the "untested" word above which makes me think we should test
both Big and Little boot modes on r8a7790. The default "Big" mode
where CA15 is used usually gets a lot of attention, but little mode
with CA7 boot should also work with the same kernel image.

Cheers,

/ magnus
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Simon Horman Jan. 16, 2015, 2:15 a.m. UTC | #2
On Fri, Jan 16, 2015 at 10:49:33AM +0900, Magnus Damm wrote:
> Hi Geert,
> 
> On Thu, Jan 15, 2015 at 10:50 PM, Geert Uytterhoeven
> <geert+renesas@glider.be> wrote:
> > R-Car H2 (r8a7790) contains four Cortex-A15 and four Cortex-A7 cores,
> > hence the second interrupt specifier cell for Private Peripheral
> > Interrupts should use "GIC_CPU_MASK_SIMPLE(8)", to make sure interrupts
> > can be delivered to all 8 processor cores.
> >
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > ---
> > Untested
> >
> > v2:
> >   - Drop RFC status after receiving confirmation from Liviu Dudau.
> 
> Thanks for your work on this.
> 
> I see the "untested" word above which makes me think we should test
> both Big and Little boot modes on r8a7790. The default "Big" mode
> where CA15 is used usually gets a lot of attention, but little mode
> with CA7 boot should also work with the same kernel image.

For now I have marked these as deferred pending testing.
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diff mbox

Patch

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 4b38fc92011472e0..1405064ff0245f47 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -120,7 +120,7 @@ 
 			<0 0xf1002000 0 0x1000>,
 			<0 0xf1004000 0 0x2000>,
 			<0 0xf1006000 0 0x2000>;
-		interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+		interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
 	};
 
 	gpio0: gpio@e6050000 {
@@ -204,10 +204,10 @@ 
 
 	timer {
 		compatible = "arm,armv7-timer";
-		interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-			     <1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-			     <1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-			     <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+		interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+			     <1 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+			     <1 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+			     <1 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
 	};
 
 	cmt0: timer@ffca0000 {