From patchwork Wed Jan 21 16:20:53 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulrich Hecht X-Patchwork-Id: 5679111 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id AD9059F4DC for ; Wed, 21 Jan 2015 16:21:48 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C2BDA202AE for ; Wed, 21 Jan 2015 16:21:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id F098020412 for ; Wed, 21 Jan 2015 16:21:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754019AbbAUQVl (ORCPT ); Wed, 21 Jan 2015 11:21:41 -0500 Received: from mail-wi0-f170.google.com ([209.85.212.170]:42257 "EHLO mail-wi0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754010AbbAUQVh (ORCPT ); Wed, 21 Jan 2015 11:21:37 -0500 Received: by mail-wi0-f170.google.com with SMTP id em10so16064012wid.1 for ; Wed, 21 Jan 2015 08:21:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=KYpSEo5OolAw1Qk6lrwRcy/PhdIGlQ1LLD7nFRrihyA=; b=ZF7/qsexUd/jwSLGeuhCo7eklh3x8TYlMl1LHmTE/eZLUMX25oxX8QmQmMXA44RZwO Hhpozxmf1XBJEsgNeedAnJhf6TnVINEwMPtAkAIcwYrxmVE4hzG2yxolIUeCx+C5gybk 2vCfwgCYTDUlK2FJYWVP64NbXmpB0WgdPajulTZYqIUPxwMon1GXgbVjZhi0wKR1L1En H3K9Tp7YDl3gFkUA1UwKmt6u/0aNTunj/4/OlPB57p4gyqNLFLjbQ4yNLVUurpMa4V+p 7CBC2vEWHiVTONoxqYPRNx0QlNSk+qEgWkKCFogu07uTBq8sWZ6aIhIrhN4/bpMD/y6Q SeHw== X-Received: by 10.180.93.103 with SMTP id ct7mr4385786wib.77.1421857295168; Wed, 21 Jan 2015 08:21:35 -0800 (PST) Received: from groucho.site (ipbcc0217c.dynamic.kabel-deutschland.de. [188.192.33.124]) by mx.google.com with ESMTPSA id wa5sm409687wjc.8.2015.01.21.08.21.33 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 21 Jan 2015 08:21:34 -0800 (PST) From: Ulrich Hecht To: kuninori.morimoto.gx@renesas.com, linux-sh@vger.kernel.org Cc: horms@verge.net.au, mturquette@linaro.org, magnus.damm@gmail.com, geert@linux-m68k.org, laurent.pinchart+renesas@ideasonboard.com, Ulrich Hecht Subject: [PATCH 02/11] ARM: shmobile: r8a7778: add CPG register bits header Date: Wed, 21 Jan 2015 17:20:53 +0100 Message-Id: <1421857262-16607-3-git-send-email-ulrich.hecht+renesas@gmail.com> X-Mailer: git-send-email 2.2.2 In-Reply-To: <1421857262-16607-1-git-send-email-ulrich.hecht+renesas@gmail.com> References: <1421857262-16607-1-git-send-email-ulrich.hecht+renesas@gmail.com> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Enumerates CPG driver custom clocks and MSTP clock enable bits. Signed-off-by: Ulrich Hecht --- include/dt-bindings/clock/r8a7778-clock.h | 72 +++++++++++++++++++++++++++++++ 1 file changed, 72 insertions(+) create mode 100644 include/dt-bindings/clock/r8a7778-clock.h diff --git a/include/dt-bindings/clock/r8a7778-clock.h b/include/dt-bindings/clock/r8a7778-clock.h new file mode 100644 index 0000000..6c5f3d9 --- /dev/null +++ b/include/dt-bindings/clock/r8a7778-clock.h @@ -0,0 +1,72 @@ +/* + * Copyright (C) 2014 Ulrich Hecht + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __DT_BINDINGS_CLOCK_R8A7778_H__ +#define __DT_BINDINGS_CLOCK_R8A7778_H__ + +/* CPG */ +#define R8A7778_CLK_EXTAL 0 +#define R8A7778_CLK_PLLA 1 +#define R8A7778_CLK_PLLB 2 +#define R8A7778_CLK_B 3 +#define R8A7778_CLK_OUT 4 +#define R8A7778_CLK_P 5 +#define R8A7778_CLK_S 6 +#define R8A7778_CLK_S1 7 + +/* MSTP0 */ +#define R8A7778_CLK_I2C0 30 +#define R8A7778_CLK_I2C1 29 +#define R8A7778_CLK_I2C2 28 +#define R8A7778_CLK_I2C3 27 +#define R8A7778_CLK_SCIF0 26 +#define R8A7778_CLK_SCIF1 25 +#define R8A7778_CLK_SCIF2 24 +#define R8A7778_CLK_SCIF3 23 +#define R8A7778_CLK_SCIF4 22 +#define R8A7778_CLK_SCIF5 21 +#define R8A7778_CLK_TMU0 16 +#define R8A7778_CLK_TMU1 15 +#define R8A7778_CLK_TMU2 14 +#define R8A7778_CLK_SSI0 12 +#define R8A7778_CLK_SSI1 11 +#define R8A7778_CLK_SSI2 10 +#define R8A7778_CLK_SSI3 9 +#define R8A7778_CLK_SRU 8 +#define R8A7778_CLK_HSPI 7 + +/* MSTP1 */ +#define R8A7778_CLK_ETHER 14 +#define R8A7778_CLK_VIN0 10 +#define R8A7778_CLK_VIN1 9 +#define R8A7778_CLK_USB 0 + +/* MSTP3 */ +#define R8A7778_CLK_MMC 31 +#define R8A7778_CLK_SDHI0 23 +#define R8A7778_CLK_SDHI1 22 +#define R8A7778_CLK_SDHI2 21 +#define R8A7778_CLK_SSI4 11 +#define R8A7778_CLK_SSI5 10 +#define R8A7778_CLK_SSI6 9 +#define R8A7778_CLK_SSI7 8 +#define R8A7778_CLK_SSI8 7 + +/* MSTP5 */ +#define R8A7778_CLK_SCU0 31 +#define R8A7778_CLK_SCU1 30 +#define R8A7778_CLK_SCU2 29 +#define R8A7778_CLK_SCU3 28 +#define R8A7778_CLK_SCU4 27 +#define R8A7778_CLK_SCU5 26 +#define R8A7778_CLK_SCU6 25 +#define R8A7778_CLK_SCU7 24 +#define R8A7778_CLK_SCU8 23 + +#endif /* __DT_BINDINGS_CLOCK_R8A7778_H__ */