From patchwork Fri Jan 30 06:11:54 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 5746691 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 903E49F38B for ; Fri, 30 Jan 2015 06:12:10 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id AE9BD2024D for ; Fri, 30 Jan 2015 06:12:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id CA5962024C for ; Fri, 30 Jan 2015 06:12:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753487AbbA3GMI (ORCPT ); Fri, 30 Jan 2015 01:12:08 -0500 Received: from mail-pa0-f48.google.com ([209.85.220.48]:33124 "EHLO mail-pa0-f48.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753368AbbA3GMH (ORCPT ); Fri, 30 Jan 2015 01:12:07 -0500 Received: by mail-pa0-f48.google.com with SMTP id ey11so48445153pad.7 for ; Thu, 29 Jan 2015 22:12:06 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id; bh=rnnK9gTXeS83PoUfXyL4MJRpG2KtSmPIqCLOu+MpMUw=; b=a2aWGkXAAgzUsHJG2P2pD6FkudU+llRpL9CeiotBWFutqZOmy+CEyfv9r/ekMolH3I qP1Ql8AHhc2mZ0vtbxXZ+mEvI0pOc9nsoiit3Ky2jGkcEcvIaVuzl2vKrehIs/bYXqft XLtBmnbmdnUAOFYPK63NWYONS74I/EgJcI+Udc/Bzj7y3Tyqm6KgsyLWxT4Bd7DJxzUj kMjA6VRSeSlTqCimctz+AxjB3rEKTnTW0thSzorm5ZaMTb5E6cK96sXbH0tOyJ3YV3JD czAP7YeR6e7pamLjRHa5gSfCnlX9Q8ZL8tSoJjFpIJMOKxgpFSGahMpQP+4AjSotU3qV lOYA== X-Gm-Message-State: ALoCoQkY9t0W8jWqDlV5HP61xc8yG7NGvJn+1h1qYKAWfZ8z6MJiZONR6kzPNsANuoyIgSemnbMH X-Received: by 10.70.140.6 with SMTP id rc6mr6481827pdb.144.1422598326741; Thu, 29 Jan 2015 22:12:06 -0800 (PST) Received: from xps-iwamatsu.renesas.com (49.14.32.202.bf.2iij.net. [202.32.14.49]) by mx.google.com with ESMTPSA id ej7sm9680723pac.21.2015.01.29.22.12.02 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 29 Jan 2015 22:12:04 -0800 (PST) From: Nobuhiro Iwamatsu To: broonie@kernel.org Cc: linux-spi@vger.kernel.org, linux-sh@vger.kernel.org, sergei.shtylyov@cogentembedded.com, geert@glider.be, Nobuhiro Iwamatsu Subject: [PATCH] spi: sh-msiof: Update calculation of frequency dividing Date: Fri, 30 Jan 2015 15:11:54 +0900 Message-Id: <1422598314-6889-1-git-send-email-nobuhiro.iwamatsu.yj@renesas.com> X-Mailer: git-send-email 2.1.3 Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP sh-msiof of frequency dividing does not perform the calculation, driver have to manage setting value in the table. It is not possible to set frequency dividing value close to the actual data in this way. This changes from frequency dividing of table management to setting by calculation. This driver is able to set a value close to the actual data. Signed-off-by: Nobuhiro Iwamatsu --- v3: - Remove check of div maximum value. - Fix count of overrun by min_t. v2: - use u32 instead of unsigned long. - Fix loop. - Use SCR_BRPS instead of hoard code shift. - Add check of div maximum value. drivers/spi/spi-sh-msiof.c | 36 ++++++++++++++++-------------------- 1 file changed, 16 insertions(+), 20 deletions(-) diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c index 96a5fc0..bcc961f 100644 --- a/drivers/spi/spi-sh-msiof.c +++ b/drivers/spi/spi-sh-msiof.c @@ -241,42 +241,38 @@ static irqreturn_t sh_msiof_spi_irq(int irq, void *data) static struct { unsigned short div; - unsigned short scr; -} const sh_msiof_spi_clk_table[] = { - { 1, SCR_BRPS( 1) | SCR_BRDV_DIV_1 }, - { 2, SCR_BRPS( 1) | SCR_BRDV_DIV_2 }, - { 4, SCR_BRPS( 1) | SCR_BRDV_DIV_4 }, - { 8, SCR_BRPS( 1) | SCR_BRDV_DIV_8 }, - { 16, SCR_BRPS( 1) | SCR_BRDV_DIV_16 }, - { 32, SCR_BRPS( 1) | SCR_BRDV_DIV_32 }, - { 64, SCR_BRPS(32) | SCR_BRDV_DIV_2 }, - { 128, SCR_BRPS(32) | SCR_BRDV_DIV_4 }, - { 256, SCR_BRPS(32) | SCR_BRDV_DIV_8 }, - { 512, SCR_BRPS(32) | SCR_BRDV_DIV_16 }, - { 1024, SCR_BRPS(32) | SCR_BRDV_DIV_32 }, + unsigned short brdv; +} const sh_msiof_spi_div_table[] = { + { 1, SCR_BRDV_DIV_1 }, + { 2, SCR_BRDV_DIV_2 }, + { 4, SCR_BRDV_DIV_4 }, + { 8, SCR_BRDV_DIV_8 }, + { 16, SCR_BRDV_DIV_16 }, + { 32, SCR_BRDV_DIV_32 }, }; static void sh_msiof_spi_set_clk_regs(struct sh_msiof_spi_priv *p, unsigned long parent_rate, u32 spi_hz) { unsigned long div = 1024; + u32 brps, scr; size_t k; if (!WARN_ON(!spi_hz || !parent_rate)) div = DIV_ROUND_UP(parent_rate, spi_hz); - /* TODO: make more fine grained */ - - for (k = 0; k < ARRAY_SIZE(sh_msiof_spi_clk_table); k++) { - if (sh_msiof_spi_clk_table[k].div >= div) + for (k = 0; k < ARRAY_SIZE(sh_msiof_spi_div_table); k++) { + brps = DIV_ROUND_UP(div, sh_msiof_spi_div_table[k].div); + if (brps <= 32) /* max of brdv is 32 */ break; } - k = min_t(int, k, ARRAY_SIZE(sh_msiof_spi_clk_table) - 1); + k = min_t(int, k, ARRAY_SIZE(sh_msiof_spi_div_table) - 1); - sh_msiof_write(p, TSCR, sh_msiof_spi_clk_table[k].scr); + scr = sh_msiof_spi_div_table[k].brdv | SCR_BRPS(brps); + sh_msiof_write(p, TSCR, scr); if (!(p->chipdata->master_flags & SPI_MASTER_MUST_TX)) - sh_msiof_write(p, RSCR, sh_msiof_spi_clk_table[k].scr); + sh_msiof_write(p, RSCR, scr); } static void sh_msiof_spi_set_pin_regs(struct sh_msiof_spi_priv *p,