[PATCH/RFC] spi: sh-msiof: Fix MSIOF address for DMAC

Commit Message

Yoshihiro Kaneko March 15, 2015, 2:36 p.m. UTC

From: Ryo Kataoka <[e-mail]>

MSIOF Base Address H'E6xx can be accessed by CPU and DMAC.
MSIOF Base Address H'E7xx for DMAC was removed from H/W manual.

Signed-off-by: Ryo Kataoka <[e-mail]>
Signed-off-by: Yoshihiro Kaneko <[e-mail]>
---

Hi Geert-san,

I have also found patches to address this problem in DTS files
which seems to be a good way to handle this problem. I plan to send
them separately. I'm unsure if this driver change is also appropriate.


This patch is based on the for-next branch of Mark Brown's spi tree.

 drivers/spi/spi-sh-msiof.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

Comments

Geert Uytterhoeven March 17, 2015, 9:28 a.m. UTC | #1

Hi Kaneko-san, Kataoka-san,

On Sun, Mar 15, 2015 at 3:36 PM, Yoshihiro Kaneko <[e-mail]> wrote:
> From: Ryo Kataoka <[e-mail]>
>
> MSIOF Base Address H'E6xx can be accessed by CPU and DMAC.
> MSIOF Base Address H'E7xx for DMAC was removed from H/W manual.

"Address 0xE7xx can be accesses only from DMA." was indeed removed.
However, "Note: Address H'E6xx can be accessed only by CPU." is still
there in the latest version of the R-Car Gen2 manual I have (v1.01).
Presumably all of this was copied from another SoC (see below)?

MSIOF DMA seems to work fine on my Koelsch (R-Car M2-W ES1.0) with this patch
(and the DTS changes) applied, though.

> Signed-off-by: Ryo Kataoka <[e-mail]>
> Signed-off-by: Yoshihiro Kaneko <[e-mail]>
> ---
>
> Hi Geert-san,
>
> I have also found patches to address this problem in DTS files
> which seems to be a good way to handle this problem. I plan to send
> them separately. I'm unsure if this driver change is also appropriate.

If there really exist no SoCs where the DMA engine has to access a different
register set than the CPU, then it can be removed from the driver, and from
the binding docs in Documentation/devicetree/bindings/spi/sh-msiof.txt.

However, according to the manuals, SH-Mobile AG5 (sh73a0), R-Mobile APE6
(r8a73a4), and R-Mobile A1 (r8a7740) also have MSIOF blocks with two register
banks?

Thanks!

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [e-mail]

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
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Simon Horman March 19, 2015, 6:52 a.m. UTC | #2

Hi Geert,

On Tue, Mar 17, 2015 at 10:28:22AM +0100, Geert Uytterhoeven wrote:
> Hi Kaneko-san, Kataoka-san,
> 
> On Sun, Mar 15, 2015 at 3:36 PM, Yoshihiro Kaneko <[e-mail]> wrote:
> > From: Ryo Kataoka <[e-mail]>
> >
> > MSIOF Base Address H'E6xx can be accessed by CPU and DMAC.
> > MSIOF Base Address H'E7xx for DMAC was removed from H/W manual.
> 
> "Address 0xE7xx can be accesses only from DMA." was indeed removed.
> However, "Note: Address H'E6xx can be accessed only by CPU." is still
> there in the latest version of the R-Car Gen2 manual I have (v1.01).

Thanks, somehow I miss-read the H'E6xx portion of the manual when
I looked over this patch prior to Kaneko-san posting it.

> Presumably all of this was copied from another SoC (see below)?
>
> MSIOF DMA seems to work fine on my Koelsch (R-Car M2-W ES1.0) with this patch
> (and the DTS changes) applied, though.
>
> > Signed-off-by: Ryo Kataoka <[e-mail]>
> > Signed-off-by: Yoshihiro Kaneko <[e-mail]>
> > ---
> >
> > Hi Geert-san,
> >
> > I have also found patches to address this problem in DTS files
> > which seems to be a good way to handle this problem. I plan to send
> > them separately. I'm unsure if this driver change is also appropriate.
> 
> If there really exist no SoCs where the DMA engine has to access a different
> register set than the CPU, then it can be removed from the driver, and from
> the binding docs in Documentation/devicetree/bindings/spi/sh-msiof.txt.
> 
> However, according to the manuals, SH-Mobile AG5 (sh73a0), R-Mobile APE6
> (r8a73a4), and R-Mobile A1 (r8a7740) also have MSIOF blocks with two register
> banks?

Looking over the documentation for those SoCs, yes that does seem to be the
case. And for the APE6 (I have v0.7 of the manual) it specifies 0xE6xx can
only be accessed by CPU while 0xE7xx can be accessed only from DMA. Unless
that documentation is wrong then it seems to support leaving the driver as is.
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Patch

diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c
index e57eec0..88ec049 100644
--- a/drivers/spi/spi-sh-msiof.c
+++ b/drivers/spi/spi-sh-msiof.c
@@ -1,6 +1,7 @@ 
 /*
  * SuperH MSIOF SPI Master Interface
  *
+ * Copyright (C) 2014-2015 Renesas Electronics Corporation
  * Copyright (c) 2009 Magnus Damm
  * Copyright (C) 2014 Glider bvba
  *
@@ -1072,10 +1073,7 @@  static int sh_msiof_request_dma(struct sh_msiof_spi_priv *p)
 		return 0;
 	}
 
-	/* The DMA engine uses the second register set, if present */
-	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
-	if (!res)
-		res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 
 	master = p->master;
 	master->dma_tx = sh_msiof_request_dma_chan(dev, DMA_MEM_TO_DEV,