From patchwork Wed Mar 18 18:55:58 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 6043261 X-Patchwork-Delegate: horms@verge.net.au Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 1DA2ABF90F for ; Wed, 18 Mar 2015 18:56:47 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 43884203EC for ; Wed, 18 Mar 2015 18:56:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2DE9320444 for ; Wed, 18 Mar 2015 18:56:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933286AbbCRS4J (ORCPT ); Wed, 18 Mar 2015 14:56:09 -0400 Received: from baptiste.telenet-ops.be ([195.130.132.51]:41058 "EHLO baptiste.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933172AbbCRS4E (ORCPT ); Wed, 18 Mar 2015 14:56:04 -0400 Received: from ayla.of.borg ([84.193.93.87]) by baptiste.telenet-ops.be with bizsmtp id 56w11q0101t5w8s016w10G; Wed, 18 Mar 2015 19:56:02 +0100 Received: from ramsan.of.borg ([192.168.97.29] helo=ramsan) by ayla.of.borg with esmtp (Exim 4.82) (envelope-from ) id 1YYJ8L-0007uT-FP; Wed, 18 Mar 2015 19:56:01 +0100 Received: from geert by ramsan with local (Exim 4.82) (envelope-from ) id 1YYJ8N-00077q-3b; Wed, 18 Mar 2015 19:56:03 +0100 From: Geert Uytterhoeven To: Thomas Gleixner , Jason Cooper , Simon Horman , Magnus Damm Cc: linux-sh@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH 4/7] ARM: shmobile: r8a7734: Add IRQC clock to device tree Date: Wed, 18 Mar 2015 19:55:58 +0100 Message-Id: <1426704961-27322-5-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1426704961-27322-1-git-send-email-geert+renesas@glider.be> References: <1426704961-27322-1-git-send-email-geert+renesas@glider.be> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Link the external IRQ controllers irqc0 and irqc1 to the IRQC module clock, so they can be power managed using that clock. Signed-off-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a73a4.dtsi | 11 +++++++---- include/dt-bindings/clock/r8a73a4-clock.h | 1 + 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi index 0fd889f88109de17..7ee22a41c6c97488 100644 --- a/arch/arm/boot/dts/r8a73a4.dtsi +++ b/arch/arm/boot/dts/r8a73a4.dtsi @@ -163,6 +163,7 @@ <0 29 IRQ_TYPE_LEVEL_HIGH>, <0 30 IRQ_TYPE_LEVEL_HIGH>, <0 31 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp4_clks R8A73A4_CLK_IRQC>; power-domains = <&pd_c4>; }; @@ -197,6 +198,7 @@ <0 55 IRQ_TYPE_LEVEL_HIGH>, <0 56 IRQ_TYPE_LEVEL_HIGH>, <0 57 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp4_clks R8A73A4_CLK_IRQC>; power-domains = <&pd_c4>; }; @@ -724,15 +726,16 @@ mstp4_clks: mstp4_clks@e6150140 { compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>; - clocks = <&main_div2_clk>, <&cpg_clocks R8A73A4_CLK_HP>, + clocks = <&main_div2_clk>, <&main_div2_clk>, + <&cpg_clocks R8A73A4_CLK_HP>, <&cpg_clocks R8A73A4_CLK_HP>; #clock-cells = <1>; clock-indices = < - R8A73A4_CLK_IIC5 R8A73A4_CLK_IIC4 - R8A73A4_CLK_IIC3 + R8A73A4_CLK_IRQC R8A73A4_CLK_IIC5 + R8A73A4_CLK_IIC4 R8A73A4_CLK_IIC3 >; clock-output-names = - "iic5", "iic4", "iic3"; + "irqc", "iic5", "iic4", "iic3"; }; mstp5_clks: mstp5_clks@e6150144 { compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/r8a73a4-clock.h b/include/dt-bindings/clock/r8a73a4-clock.h index 9a4b4c9ca44aba70..dd11ecdf837e8e65 100644 --- a/include/dt-bindings/clock/r8a73a4-clock.h +++ b/include/dt-bindings/clock/r8a73a4-clock.h @@ -54,6 +54,7 @@ #define R8A73A4_CLK_IIC3 11 #define R8A73A4_CLK_IIC4 10 #define R8A73A4_CLK_IIC5 9 +#define R8A73A4_CLK_IRQC 7 /* MSTP5 */ #define R8A73A4_CLK_THERMAL 22