From patchwork Fri Mar 20 12:30:36 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulrich Hecht X-Patchwork-Id: 6056131 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 16D609F318 for ; Fri, 20 Mar 2015 12:30:52 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2353A202FF for ; Fri, 20 Mar 2015 12:30:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 088EF20220 for ; Fri, 20 Mar 2015 12:30:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751229AbbCTMat (ORCPT ); Fri, 20 Mar 2015 08:30:49 -0400 Received: from mail-wi0-f181.google.com ([209.85.212.181]:37163 "EHLO mail-wi0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751246AbbCTMas (ORCPT ); Fri, 20 Mar 2015 08:30:48 -0400 Received: by wixw10 with SMTP id w10so19038906wix.0 for ; Fri, 20 Mar 2015 05:30:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=skTy5u/tP66WsYvunOWFjAscRM89w/fdHKeGWP0geTc=; b=0agj9cADfg6DWHy/m74fbkWR2r5mbUBPcEVDTOTar7xXeTfW2gy/+YRCWNq5v6MwGo ezG0w/6Npb1T3vigDzW7RfaYqHhSjbXuRw36Xr32H1KEPS8T0Khc8yTcCefFf8k+/x6l tG819OGzkAAuC5Il9BSU/2trtyilQkfoUd8iCCvd2CHsvw/e6XkYS7PjyLkT+Rqxfxn9 wW1XUlrjT48i4vqzZ4ImVjueox2dkIIcKwzKjL2lp7hIXK0qoNToeBvyE6ZH+mlIRgCu pTjYFi181VM6GLP/bEmFH7Q0TwIMlEJcx+fwk9MOwlwFRYJ7JzEfAIB9eDJ0IS9AH6lh /r/g== X-Received: by 10.180.76.147 with SMTP id k19mr4809315wiw.92.1426854647610; Fri, 20 Mar 2015 05:30:47 -0700 (PDT) Received: from groucho.site (ipbcc0217c.dynamic.kabel-deutschland.de. [188.192.33.124]) by mx.google.com with ESMTPSA id e2sm6154172wjy.46.2015.03.20.05.30.46 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 20 Mar 2015 05:30:46 -0700 (PDT) From: Ulrich Hecht To: horms@verge.net.au, linux-sh@vger.kernel.org Cc: magnus.damm@gmail.com, laurent.pinchart+renesas@ideasonboard.com, kuninori.morimoto.gx@renesas.com, Ulrich Hecht Subject: [PATCH 1/3] pinctrl: sh-pfc: add macros defining GP ports with config flags Date: Fri, 20 Mar 2015 13:30:36 +0100 Message-Id: <1426854638-9187-2-git-send-email-ulrich.hecht+renesas@gmail.com> X-Mailer: git-send-email 2.2.2 In-Reply-To: <1426854638-9187-1-git-send-email-ulrich.hecht+renesas@gmail.com> References: <1426854638-9187-1-git-send-email-ulrich.hecht+renesas@gmail.com> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP PORT_GP_CFG_1 and PORT_GP_CFG_32 work like their non-CFG counterparts but accept an extra argument with config flags. Signed-off-by: Ulrich Hecht --- drivers/pinctrl/sh-pfc/sh_pfc.h | 47 ++++++++++++++++++++++------------------- 1 file changed, 25 insertions(+), 22 deletions(-) diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h index c837286..6b28276 100644 --- a/drivers/pinctrl/sh-pfc/sh_pfc.h +++ b/drivers/pinctrl/sh-pfc/sh_pfc.h @@ -178,25 +178,27 @@ struct sh_pfc_soc_info { * GP port style (32 ports banks) */ -#define PORT_GP_1(bank, pin, fn, sfx) fn(bank, pin, GP_##bank##_##pin, sfx) - -#define PORT_GP_32(bank, fn, sfx) \ - PORT_GP_1(bank, 0, fn, sfx), PORT_GP_1(bank, 1, fn, sfx), \ - PORT_GP_1(bank, 2, fn, sfx), PORT_GP_1(bank, 3, fn, sfx), \ - PORT_GP_1(bank, 4, fn, sfx), PORT_GP_1(bank, 5, fn, sfx), \ - PORT_GP_1(bank, 6, fn, sfx), PORT_GP_1(bank, 7, fn, sfx), \ - PORT_GP_1(bank, 8, fn, sfx), PORT_GP_1(bank, 9, fn, sfx), \ - PORT_GP_1(bank, 10, fn, sfx), PORT_GP_1(bank, 11, fn, sfx), \ - PORT_GP_1(bank, 12, fn, sfx), PORT_GP_1(bank, 13, fn, sfx), \ - PORT_GP_1(bank, 14, fn, sfx), PORT_GP_1(bank, 15, fn, sfx), \ - PORT_GP_1(bank, 16, fn, sfx), PORT_GP_1(bank, 17, fn, sfx), \ - PORT_GP_1(bank, 18, fn, sfx), PORT_GP_1(bank, 19, fn, sfx), \ - PORT_GP_1(bank, 20, fn, sfx), PORT_GP_1(bank, 21, fn, sfx), \ - PORT_GP_1(bank, 22, fn, sfx), PORT_GP_1(bank, 23, fn, sfx), \ - PORT_GP_1(bank, 24, fn, sfx), PORT_GP_1(bank, 25, fn, sfx), \ - PORT_GP_1(bank, 26, fn, sfx), PORT_GP_1(bank, 27, fn, sfx), \ - PORT_GP_1(bank, 28, fn, sfx), PORT_GP_1(bank, 29, fn, sfx), \ - PORT_GP_1(bank, 30, fn, sfx), PORT_GP_1(bank, 31, fn, sfx) +#define PORT_GP_CFG_1(bank, pin, fn, sfx, cfg) fn(bank, pin, GP_##bank##_##pin, sfx, cfg) +#define PORT_GP_1(bank, pin, fn, sfx) PORT_GP_CFG_1(bank, pin, fn, sfx, 0) + +#define PORT_GP_CFG_32(bank, fn, sfx, cfg) \ + PORT_GP_CFG_1(bank, 0, fn, sfx, cfg), PORT_GP_CFG_1(bank, 1, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 2, fn, sfx, cfg), PORT_GP_CFG_1(bank, 3, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 4, fn, sfx, cfg), PORT_GP_CFG_1(bank, 5, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 6, fn, sfx, cfg), PORT_GP_CFG_1(bank, 7, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 8, fn, sfx, cfg), PORT_GP_CFG_1(bank, 9, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 10, fn, sfx, cfg), PORT_GP_CFG_1(bank, 11, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 12, fn, sfx, cfg), PORT_GP_CFG_1(bank, 13, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 14, fn, sfx, cfg), PORT_GP_CFG_1(bank, 15, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 16, fn, sfx, cfg), PORT_GP_CFG_1(bank, 17, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 18, fn, sfx, cfg), PORT_GP_CFG_1(bank, 19, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 20, fn, sfx, cfg), PORT_GP_CFG_1(bank, 21, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 22, fn, sfx, cfg), PORT_GP_CFG_1(bank, 23, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 24, fn, sfx, cfg), PORT_GP_CFG_1(bank, 25, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 26, fn, sfx, cfg), PORT_GP_CFG_1(bank, 27, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 28, fn, sfx, cfg), PORT_GP_CFG_1(bank, 29, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 30, fn, sfx, cfg), PORT_GP_CFG_1(bank, 31, fn, sfx, cfg) +#define PORT_GP_32(bank, fn, sfx) PORT_GP_CFG_32(bank, fn, sfx, 0) #define PORT_GP_32_REV(bank, fn, sfx) \ PORT_GP_1(bank, 31, fn, sfx), PORT_GP_1(bank, 30, fn, sfx), \ @@ -217,20 +219,21 @@ struct sh_pfc_soc_info { PORT_GP_1(bank, 1, fn, sfx), PORT_GP_1(bank, 0, fn, sfx) /* GP_ALL(suffix) - Expand to a list of GP_#_#_suffix */ -#define _GP_ALL(bank, pin, name, sfx) name##_##sfx +#define _GP_ALL(bank, pin, name, sfx, cfg) name##_##sfx #define GP_ALL(str) CPU_ALL_PORT(_GP_ALL, str) /* PINMUX_GPIO_GP_ALL - Expand to a list of sh_pfc_pin entries */ -#define _GP_GPIO(bank, _pin, _name, sfx) \ +#define _GP_GPIO(bank, _pin, _name, sfx, cfg) \ [(bank * 32) + _pin] = { \ .pin = (bank * 32) + _pin, \ .name = __stringify(_name), \ .enum_id = _name##_DATA, \ + .configs = cfg, \ } #define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, unused) /* PINMUX_DATA_GP_ALL - Expand to a list of name_DATA, name_FN marks */ -#define _GP_DATA(bank, pin, name, sfx) PINMUX_DATA(name##_DATA, name##_FN) +#define _GP_DATA(bank, pin, name, sfx, cfg) PINMUX_DATA(name##_DATA, name##_FN) #define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, unused) /*