From patchwork Thu Jun 4 18:53:37 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 6549381 X-Patchwork-Delegate: horms@verge.net.au Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 02EF39F1CC for ; Thu, 4 Jun 2015 18:55:53 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 21AF9206FE for ; Thu, 4 Jun 2015 18:55:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 34CA9207B2 for ; Thu, 4 Jun 2015 18:55:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754037AbbFDSzN (ORCPT ); Thu, 4 Jun 2015 14:55:13 -0400 Received: from albert.telenet-ops.be ([195.130.137.90]:57306 "EHLO albert.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754016AbbFDSxr (ORCPT ); Thu, 4 Jun 2015 14:53:47 -0400 Received: from ayla.of.borg ([84.193.93.87]) by albert.telenet-ops.be with bizsmtp id cJtd1q0191t5w8s06JtdhV; Thu, 04 Jun 2015 20:53:45 +0200 Received: from ramsan.of.borg ([192.168.97.29] helo=ramsan) by ayla.of.borg with esmtp (Exim 4.82) (envelope-from ) id 1Z0aGn-0006Jq-It; Thu, 04 Jun 2015 20:53:37 +0200 Received: from geert by ramsan with local (Exim 4.82) (envelope-from ) id 1Z0aGv-0005oC-Op; Thu, 04 Jun 2015 20:53:45 +0200 From: Geert Uytterhoeven To: Simon Horman , Magnus Damm , "Rafael J. Wysocki" , Kevin Hilman , Ulf Hansson , Lina Iyer , Mark Rutland , Pawel Moll Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-sh@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH/RFC 11/15] ARM: shmobile: r8a7779 dtsi: Add SYSC PM domains Date: Thu, 4 Jun 2015 20:53:37 +0200 Message-Id: <1433444021-22167-12-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1433444021-22167-1-git-send-email-geert+renesas@glider.be> References: <1433444021-22167-1-git-send-email-geert+renesas@glider.be> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add a device node for the System Controller, with subnodes that represent the hardware power area hierarchy. Hook up ARM CPU cores 1-3 to their respective PM domains. Note that ARM CPU core 0 cannot be shut off. Signed-off-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7779.dtsi | 48 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index d75f46a539749eae..fbcf02c09fa5b57c 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -34,18 +34,21 @@ compatible = "arm,cortex-a9"; reg = <1>; clock-frequency = <1000000000>; + power-domains = <&pd_arm1>; }; cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <2>; clock-frequency = <1000000000>; + power-domains = <&pd_arm2>; }; cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <3>; clock-frequency = <1000000000>; + power-domains = <&pd_arm3>; }; }; @@ -569,4 +572,49 @@ "mmc1", "mmc0"; }; }; + + sysc: system-controller@ffd85000 { + compatible = "renesas,sysc-r8a7779", "renesas,sysc-rcar"; + reg = <0 0xffd85000 0 0x0200>; + + pm-domains { + #address-cells = <2>; + #size-cells = <0>; + + pd_arm1: cpu@1 { + reg = <1 0x41>; + #power-domain-cells = <0>; + }; + + pd_arm2: cpu@2 { + reg = <2 0x42>; + #power-domain-cells = <0>; + }; + + pd_arm3: cpu@3 { + reg = <3 0x43>; + #power-domain-cells = <0>; + }; + + pd_sh: sh@16 { + reg = <16 0x80>; + #power-domain-cells = <0>; + }; + + pd_sgx: sgx@20 { + reg = <20 0xc0>; + #power-domain-cells = <0>; + }; + + pd_vdp: vdp@21 { + reg = <21 0x100>; + #power-domain-cells = <0>; + }; + + pd_imp: imp@24 { + reg = <24 0x140>; + #power-domain-cells = <0>; + }; + }; + }; };