From patchwork Wed Aug 5 08:58:07 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 6946991 X-Patchwork-Delegate: horms@verge.net.au Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id C773B9F46B for ; Wed, 5 Aug 2015 08:58:21 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id EFB0920379 for ; Wed, 5 Aug 2015 08:58:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8C653203A0 for ; Wed, 5 Aug 2015 08:58:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750742AbbHEI6S (ORCPT ); Wed, 5 Aug 2015 04:58:18 -0400 Received: from albert.telenet-ops.be ([195.130.137.90]:39212 "EHLO albert.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750881AbbHEI6P (ORCPT ); Wed, 5 Aug 2015 04:58:15 -0400 Received: from ayla.of.borg ([84.193.93.87]) by albert.telenet-ops.be with bizsmtp id 0wyC1r00L1t5w8s06wyCcu; Wed, 05 Aug 2015 10:58:13 +0200 Received: from ramsan.of.borg ([192.168.97.29] helo=ramsan) by ayla.of.borg with esmtp (Exim 4.82) (envelope-from ) id 1ZMuWZ-0004Aw-UY; Wed, 05 Aug 2015 10:58:11 +0200 Received: from geert by ramsan with local (Exim 4.82) (envelope-from ) id 1ZMuWb-0000Ej-KD; Wed, 05 Aug 2015 10:58:13 +0200 From: Geert Uytterhoeven To: Simon Horman , Magnus Damm Cc: linux-arm-kernel@lists.infradead.org, linux-sh@vger.kernel.org, devicetree@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v4 3/6] ARM: shmobile: sh73a0 dtsi: Add L2 cache-controller node Date: Wed, 5 Aug 2015 10:58:07 +0200 Message-Id: <1438765090-823-4-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1438765090-823-1-git-send-email-geert+renesas@glider.be> References: <1438765090-823-1-git-send-email-geert+renesas@glider.be> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-7.0 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add the missing L2 cache-controller node. This will allow migration to the generic l2c OF initialization. The L2 cache is an ARM L2C-310 (r3p1), of size 512 KiB (64 KiB x 8 ways). Signed-off-by: Geert Uytterhoeven --- v4: - New, - Commit eeedcea69e927857 ("ARM: 8395/1: l2c: Add support for the "arm,shared-override" property") is queued for 4.3 in arm/for-next. --- arch/arm/boot/dts/sh73a0.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi index 11e17c5f26e2cae2..e84fce5e4090f4ab 100644 --- a/arch/arm/boot/dts/sh73a0.dtsi +++ b/arch/arm/boot/dts/sh73a0.dtsi @@ -53,6 +53,22 @@ <0xf0000100 0x100>; }; + L2: cache-controller { + compatible = "arm,pl310-cache"; + reg = <0xf0100000 0x1000>; + interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&pd_a3sm>; + arm,data-latency = <3 3 3>; + arm,tag-latency = <2 2 2>; + arm,shared-override; + cache-unified; + cache-level = <2>; + cache-size = <0x80000>; + cache-sets = <2048>; + cache-block-size = <32>; + cache-line-size = <32>; + }; + sbsc2: memory-controller@fb400000 { compatible = "renesas,sbsc-sh73a0"; reg = <0xfb400000 0x400>;