From patchwork Thu Aug 6 13:33:08 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 6958791 X-Patchwork-Delegate: horms@verge.net.au Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 5997EC05AC for ; Thu, 6 Aug 2015 13:33:47 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 59501206F6 for ; Thu, 6 Aug 2015 13:33:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 680AD206F8 for ; Thu, 6 Aug 2015 13:33:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753442AbbHFNdm (ORCPT ); Thu, 6 Aug 2015 09:33:42 -0400 Received: from [195.130.137.90] ([195.130.137.90]:55229 "EHLO albert.telenet-ops.be" rhost-flags-FAIL-FAIL-OK-OK) by vger.kernel.org with ESMTP id S1752677AbbHFNdk (ORCPT ); Thu, 6 Aug 2015 09:33:40 -0400 Received: from ayla.of.borg ([84.193.93.87]) by albert.telenet-ops.be with bizsmtp id 1RZK1r0061t5w8s06RZKsl; Thu, 06 Aug 2015 15:33:19 +0200 Received: from ramsan.of.borg ([192.168.97.29] helo=ramsan) by ayla.of.borg with esmtp (Exim 4.82) (envelope-from ) id 1ZNLIN-0003i5-1N; Thu, 06 Aug 2015 15:33:19 +0200 Received: from geert by ramsan with local (Exim 4.82) (envelope-from ) id 1ZNLIN-0001Ib-0g; Thu, 06 Aug 2015 15:33:19 +0200 From: Geert Uytterhoeven To: Kuninori Morimoto , Gaku Inami , Takeshi Kihara , Simon Horman , Magnus Damm Cc: linux-sh@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH/RFC 1/2] clk: shmobile: rcar-gen3: Add CPG/MSTP Clock Domain support Date: Thu, 6 Aug 2015 15:33:08 +0200 Message-Id: <1438867989-4942-2-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1438867989-4942-1-git-send-email-geert+renesas@glider.be> References: <1438867989-4942-1-git-send-email-geert+renesas@glider.be> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-7.0 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add Clock Domain support to the R-Car Gen3 Clock Pulse Generator (CPG) driver using the generic PM Domain. This allows to power-manage the module clocks of SoC devices that are part of the CPG/MSTP Clock Domain using Runtime PM, or for system suspend/resume. SoC devices that are part of the CPG/MSTP Clock Domain and can be power-managed through an MSTP clock should be tagged in DT with a proper "power-domains" property. Signed-off-by: Geert Uytterhoeven --- .../clock/renesas,rcar-gen3-cpg-clocks.txt | 26 ++++++++++++++++++++-- arch/arm64/Kconfig.platforms | 1 + drivers/clk/shmobile/clk-rcar-gen3.c | 2 ++ 3 files changed, 27 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/renesas,rcar-gen3-cpg-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,rcar-gen3-cpg-clocks.txt index b1a7e01fd042c6ce..a46245b834e0477a 100644 --- a/Documentation/devicetree/bindings/clock/renesas,rcar-gen3-cpg-clocks.txt +++ b/Documentation/devicetree/bindings/clock/renesas,rcar-gen3-cpg-clocks.txt @@ -2,6 +2,8 @@ The CPG generates core clocks for the R-Car Gen3 SoCs. It includes three PLLs and several fixed ratio dividers. +The CPG also provides a Clock Domain for SoC devices, in combination with the +CPG Module Stop (MSTP) Clocks. Required Properties: @@ -15,10 +17,18 @@ Required Properties: - #clock-cells: Must be 1 - clock-output-names: The names of the clocks. Supported clocks are "main", "pll0", "pll1", "pll2", "pll3", "pll4" + - #power-domain-cells: Must be 0 +SoC devices that are part of the CPG/MSTP Clock Domain and can be power-managed +through an MSTP clock should refer to the CPG device node in their +"power-domains" property, as documented by the generic PM domain bindings in +Documentation/devicetree/bindings/power/power_domain.txt. -Example -------- + +Examples +-------- + + - CPG device node: cpg_clocks: cpg_clocks@e6150000 { compatible = "renesas,r8a7795-cpg-clocks", @@ -28,4 +38,16 @@ Example #clock-cells = <1>; clock-output-names = "main", "pll0", "pll1","pll2", "pll3", "pll4"; + #power-domain-cells = <0>; + }; + + - CPG/MSTP Clock Domain member device node: + + scif2: serial@e6e88000 { + compatible = "renesas,scif-r8a7795", "renesas,scif"; + reg = <0 0xe6e88000 0 64>; + interrupts = ; + clocks = <&mstp3_clks RCAR_R8A7795_CLK_SCIF2>; + clock-names = "sci_ick"; + power-domains = <&cpg_clocks>; }; diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 25a9a1a81ab8a2da..03ef02fd883ff6fe 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -49,6 +49,7 @@ config ARCH_RCAR_GEN3 bool "Renesas R-Car Gen3 SoC Platform" select ARCH_SHMOBILE select ARCH_SHMOBILE_MULTI + select PM_GENERIC_DOMAINS if PM help This enables support for Renesas SoC. diff --git a/drivers/clk/shmobile/clk-rcar-gen3.c b/drivers/clk/shmobile/clk-rcar-gen3.c index a5edc7b4da0600c6..b9d25f2acb5ca8b1 100644 --- a/drivers/clk/shmobile/clk-rcar-gen3.c +++ b/drivers/clk/shmobile/clk-rcar-gen3.c @@ -269,6 +269,8 @@ static void __init rcar_gen3_cpg_clocks_init(struct device_node *np) } of_clk_add_provider(np, of_clk_src_onecell_get, &cpg->data); + + cpg_mstp_add_clk_domain(np); } CLK_OF_DECLARE(rcar_gen3_cpg_clks, "renesas,rcar-gen3-cpg-clocks", rcar_gen3_cpg_clocks_init);